Liquid crystal display device

ABSTRACT

The liquid crystal display device includes a first substrate, a second substrate, and a liquid crystal layer between the first substrate and the second substrat. The first substrate includes a transistor including an oxide semiconductor film including a channel formation region; a pixel electrode electrically connected to the transistor; an insulating layer in contact with the pixel electrode; and a first common electrode in contact with the insulating layer. The second substrate faces the first substrate and includes a second common electrode. A negative liquid crystal material is used for the liquid crystal layer. The specific resistivity of the liquid crystal material is greater than or equal to 1.0×1013 Ω·cm and less than or equal to 1.0×1016 Ω·cm.

BACKGROUND OF THE INVENTION 1. Field of the Invention

The present invention relates to, for example, a semiconductor device, adisplay device, a light-emitting device, a driving method thereof, or amanufacturing method thereof. In particular, the present inventionrelates to, for example, an active matrix liquid crystal display device.

2. Description of the Related Art

With the recent rapid spread of portable information terminals such assmartphones, improvement in their performance has progressed rapidly.Their screens have been increased in size and resolution. In addition toimprovement in the resolution of a screen, emphasis has been put onpower consumption of a display device. A typical example of the displaydevice is a liquid crystal display device using liquid crystal elements.

Examples of display modes for the liquid crystal display device includea vertical alignment (VA) mode in which liquid crystal molecules withnegative dielectric constant anisotropy are aligned vertical to asubstrate surface; an in-plane switching (IPS) mode and and a fringefield switching (FFS) mode in which liquid crystal molecules withpositive or negative dielectric constant anisotropy are alignedhorizontal to a substrate surface and a horizontal electric field isapplied to a liquid crystal layer.

For example, as an FFS-mode liquid crystal display device, a displaydevice having high-speed response and wide viewing angle is disclosed(see Patent Document 1). The display device includes a first substratewith a first common electrode layer; liquid crystal between the firstsubstrate and a second substrate; and a means for generating an electricfield between the first common electrode layer on the first substrateand both a pixel electrode layer and a second common electrode layer onthe second substrate so that the display device provides high-speedresponses to high input data rates and allows for wide viewing anglesfor viewers.

Furthermore, as an FFS-mode liquid crystal display device, a liquidcrystal display device capable of high-speed response by driving liquidcrystal with two pairs of electrodes is disclosed (see Patent Document2).

REFERENCE Patent Document [Patent Document 1] Japanese Translation ofPCT International Application No. 2006-523850

[Patent Document 2] international Publication WO 2013/001979

SUMMARY OF THE INVENTION

For wide viewing angle and high-speed response, the liquid crystal drivedevice disclosed in Patent Document 1 uses three electrodes to controlliquid crystal molecules. However, even when high-speed response can beachieved, the three electrodes need to be driven separately, whichincreases the power consumption of the display device.

In the liquid crystal drive device disclosed in Patent Document 2, twopairs of electrodes, that is, four electrodes are used to drive liquidcrystal and at least four power supply lines are needed; thus, there isa problem in that die number of power supply lines is increased. Theincrease in the number of power supply lines complicates a method fordriving or controling voltage applied to the liquid crystal andincreases power consumption.

In view of the above technical background, an object of one embodimentof the present invention is to provide a liquid crystal display devicewith low power consumption. Another object of one embodiment of thepresent invention is to provide a liquid crystal display device in whichchange in transmittance is reduced. Another object of one embodiment ofthe present invention is to provide a liquid crystal display device inwhich change in display luminance is reduced. Another object of oneembodiment of the present invention is to provide a liquid crystaldisplay device in which flickers of display are reduced. Another objectof one embodiment of the present invention is to provide a liquidcrystal display device capable of eye-friendly display. Another objectof one embodiment of the present invention is to provide a liquidcrystal display device that causes less eye fatigue.

Note that the description of these objects does not disturb theexistence of other objects. In one embodiment of the present invention,there is no need to achieve all the objects. Other objects will beapparent from and can be derived from the description of thespecification, the drawings, the claims, and the like.

In a liquid crystal display device of one embodiment of the presentinvention, an insulated-gate field-effect transistor (hereinafter,simply referred to as a transistor) with extremely low off-state currentis provided in a pixel in order to keep display of images on a pixelportion after die writing of image signals to the pixel portion isstopped. By using the above transistor as an element for controlling thesupply of voltage to a liquid crystal element included in the pixel, thevoltage applied to the liquid crystal element can be held for a longtime. Thus, for example, in the case where image signals having the sameimage data are repeatedly written to Use pixel portion during continuousframe periods as in the case of displaying a still image, the displayedimage can be maintained even when the driving frequency is lowered bytemporarily stopping the writing of image signals to the pixel portion,that is, even when the number of times of writing of image signals in acertain period is reduced.

In the liquid crystal display device of one embodiment of the presentinvention, a liquid crystal element includes a liquid crystal layer towhich an electric field is applied by three electrodes (a pixelelectrode, a first common electrode, and a second common electrode). Anegative liquid crystal material is used for the liquid crystal layer.The specific resistivity of the liquid crystal material is greater thanor equal to 1.0×10¹³ Ω·cm and less than or equal to 1.0×10¹⁶ Ω·m. Withthis structure, the liquid crystal display device causes less change intransmittance and few image flickers perceivable by users even when thenumber of image signal writing operations in a certain period isreduced.

One embodiment of the present invention can provide a liquid crystaldisplay device with low power consumption. Another embodiment of thepresent invention can provide a liquid crystal display device with lesschange in transmittance.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A and 1B are a circuit diagram and a cross-sectional viewillustrating a configuration of a pixel in a liquid crystal displaydevice of one embodiment of the present invention.

FIG. 2A is a graph showing transmittances with different polarities inthe case of using a positive liquid crystal material and FIG. 2B is agraph showing transmittances with different polarities in the case ofusing a negative liquid crystal material.

FIG. 3 is a block diagram illustrating a configuration example of apanel of a liquid crystal display device of one embodiment of thepresent invention.

FIG. 4 is a block diagram illustrating a structure of a liquid crystaldisplay device of one embodiment of the present invention.

FIG. 5 is a top view illustrating a pixel in a liquid crystal displaydevice of one embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating a pixel in a liquidcrystal display device of one embodiment of the present invention.

FIGS. 7A to 7D are cross-sectional views illustrating a method formanufacturing a pixel in a liquid crystal display device of oneembodiment of the present invention.

FIGS. 8A to 8D are cross-sectional views illustrating the method formanufacturing a pixel in a liquid crystal display device of oneembodiment of the present invention.

FIG. 9A is a cross-sectional view illustrating a transistor that can beused in a liquid crystal display device of one embodiment of the presentinvention and FIG. 9B is a diagram illustrating an energy band of anoxide semiconductor.

FIG. 10 is a top view illustrating a pixel in a liquid crystal displaydevice of one embodiment of the present invention.

FIG. 11 is a cross-sectional view illustrating a pixel in a liquidcrystal display device of one embodiment of the present invention.

FIGS. 12A to 12D are cross-sectional views illustrating a method formanufacturing a pixel in a liquid crystal display device of oneembodiment of the present invention.

FIGS. 13A to 13C are cross-sectional views illustrating a method formanufacturing a pixel in a liquid crystal display device of oneembodiment of the present invention.

FIGS. 14A to 14F illustrate electronic devices for which a liquidcrystal display device of one embodiment of the present invention can beused.

FIGS. 15A and 15B are cross-sectional views illustrating structures ofsamples of Example.

FIGS. 16A and 16B are graphs each showing the transmittance of a sampleof Example.

FIGS. 17A and 17B are graphs each showing the transmittance of a sampleof Example.

FIGS. 18A and 18B are graphs each showing the transmittance of a sampleof Example.

FIGS. 19A and 19B are graphs each showing the transmittance of a sampleof Example.

FIGS. 20A and 20B are graphs each showing the transmittance of a sampleof Example.

FIGS. 21A to 21C are graphs each showing the transmittance of a sampleof Example.

FIGS. 22A and 22B are cross-sectional views each illustrating astructure of a liquid crystal display device used for calculation inExample.

FIG. 23 is a graph showing the results of calculating transmittances ofsamples in Example.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, embodiments of the present invention will be described indetail with reference to the accompanying drawings. Note that thepresent invention is not limited to the following description and it iseasily understood by those skilled in the an that the mode and detailscan be variously changed without departing from the scope and spirit ofthe present invention. Accordingly, the present invention should not beconstrued as being limited to the description of the embodiments below.

Note that in this specification, a panel in which liquid crystalelements are formed in respective pixels, and a module in which an IC orthe like including a driver circuit or a controller is mounted on thepanel fall into the category of a liquid crystal display device.Further, an element substrate corresponding to one mode before a liquidcrystal element is completed in a manufacturing process of a liquidcrystal display device falls into the category of the liquid crystaldisplay device of one embodiment of the present invention.

In addition, the liquid crystal display device of one embodiment of thepresent invention may include a touch panel which is a position inputdevice capable of detecting a position pointed at with a finger, astylus, or the like and generating a signal including the positionalinformation.

Embodiment 1

In this embodiment, a configuration example of a pixel in a liquidcrystal display device of one embodiment of the present invention isdescribed with reference to FIGS. 1A and 1B.

Configuration Example of Pixel

FIG. 1A illustrates a configuration example of a pixel included in theliquid crystal display device of one embodiment of the presentinvention. A pixel 100 illustrated in FIG. 1A includes a liquid crystalelement 111, a transistor 112 controlling the supply of an image signalto the liquid crystal element 111, and a capacitor 113.

The liquid crystal clement 111 includes a pixel electrode, a firstcommon electrode, a second common electrode, and a liquid crystal layerwhich contains a liquid crystal material and to which a voltage isapplied across the pixel electrode, the first common electrode, and thesecond common electrode.

In the liquid crystal element 111 illustrated in FIG. 1A, a region wherevoltage is applied between the pixel electrode and the first commonelectrode is denoted by a liquid crystal element 111 a, a region wherevoltage is applied between the pixel electrode and the second commonelectrode is denoted by a liquid crystal element 111 b, and a regionwhere voltage is applied between the first common electrode and thesecond common electrode is denoted by a liquid crystal element 111 c.

FIG. 1A illustrates a fringe field switching (FFS) mode liquid crystalelement 111, in which case the pixel electrode and the first commonelectrode partly overlap with each other with an insulating filminterposed therebetween. This overlapping area serves as a capacitor forholding a voltage V_(LC) applied between the pixel electrode and thefirst common electrode. Such a capacitor is denoted as a capacitor 113in FIG. 1A.

The transistor 112 controls whether the potential of an image signalinput to a wiring SL is applied to the pixel electrode of the liquidcrystal element 111. A predetermined reference potential V_(COM1) isapplied to the first common electrode of the liquid crystal element 111.

Hereinafter, the connection relationship among the liquid crystalelement 111, the transistor 112, and the capacitor 113 will be describedin detail.

Note that in this specification, the term “connection” means electricalconnection and corresponds to a state in which a current, a voltage, ora potential can be supplied or transmitted. Therefore, a state of being“connected” means not only a state of direct connection but also a slateof indirect connection through a circuit element such as a wiring, aresistor, a diode, or a transistor so that a current, a voltage, or apotential can be supplied or transmitted.

In addition, even when different components are connected to each otherin a circuit diagram, there is actually a case where one conductive filmhas functions of a plurality of components, for example, a ease wherepart of a wiring serves as an electrode. In this specification, the term“connection” also means such a case where one conductive film hasfunctions of a plurality of components.

The terms “source” and “drain” of a transistor interchange with eachother depending on the type of the channel of the transistor or levelsof potentials applied to the terminals. In general, in an n-channeltransistor, a terminal to which a lower potential is applied is called asource, and a terminal to which a higher potential is applied is calleda drain. In a p-channel transistor, a terminal to which a lowerpotential is applied is called a drain, and a terminal to which a higherpotential is applied is called a source. In this specification, theconnection relation of the transistor is described in some casesassuming that the source and the drain are fixed for convenience;actually, the names of the source and the drain interchange with eachother depending on the relation of the potentials.

A source of a transistor means a source region that is part of asemiconductor film functioning as an active layer or a source electrodethat is connected to the semiconductor film. Similarly, a drain of atransistor means a drain region that is part of the semiconductor filmor a drain electrode that is connected to the semiconductor film. A gatemeans a gate electrode.

In the pixel 100 illustrated in FIG. 1A, a gate of the transistor 112 iselectrically connected to a wiring GL. One of a source and a drain ofthe transistor 112 is connected to the wiring SL, and the other of thesource and the drain of the transistor 112 is connected to the pixelelectrode of the liquid crystal element 111. The capacitor 113 includesa pair of electrodes: one electrode is electrically connected to thepixel electrode of the liquid crystal clement 111, and a predeterminedpotential V_(COM1) is applied to the other electrode. In the pixel 100illustrated in FIG. 1A, the second common electrode of the liquidcrystal element 111 is connected to a wiring CL, and V_(COM2) is appliedto the wiring CL.

FIG. 1A shows an example in which one transistor 112 is used as a switchfor controlling the input of an image signal to the pixel 100.Alternatively, the pixel 100 may include a plurality of transistorsfunctioning as one switch.

In one embodiment of the present invention, the transistor 112 has anextremely low off-state current, so that the voltage applied to theliquid crystal element 111 can be held for a long time. Thus, forexample, in the case where image signals having the same image data arewritten to the pixel 100 during continuous frame periods as in the easeof displaying a still image, the displayed gray scale can be maintainedeven when the driving frequency is lowered, that is, even when thenumber of times of writing of image signals to the pixel 100 in acertain period is reduced. For example, by using a highly purified oxidesemiconductor for a channel formation region of the transistor 112, theinterval between writing operations of image signals can be made longerthan or equal to 10 seconds, preferably longer than or equal to 30seconds, and more preferably longer than or equal to one minute. Anincrease in the interval between writing operations of image signalsresults in a reduction in power consumption.

When a semiconductor having a wider bandgap and lower intrinsic carrierdensity than silicon or germanium, such as an oxide semiconductor, isused for the transistor 112, the withstand voltage of the transistor 112can be increased and the off-state current can be made extremely low.Thus, as compared to the case where a transistor including a normalsemiconductor such as silicon or germanium is used, degradation of thetransistor 112 can be prevented and the voltage held in the liquidcrystal clement 111 can be maintained.

Note that even when a small amount of charge is leaked through thetransistor 112, the electric field applied to the liquid crystal layermight vary depending on some factors after the writing of an imagesignal is completed.

One of the factors in changing the electric field applied to the liquidcrystal layer is adsorption of ionic impurities on an alignment film. Aliquid crystal material includes ionic impurities, and when theimpurities are adsorbed on the alignment film, an electric field calledresidual DC is generated in some cases. The residual DC caused by theadsorption of the impurities changes the electric field applied to theliquid crystal layer, thereby changing the transmittance of the liquidcrystal element 111. The residual DC increases when a direct-currentvoltage is applied to the liquid crystal clement for a longer time.Hence, in the case of the driving method with a long interval betweenwriting operations of image signals as in one embodiment of the presentinvention, the transmittance is mote likely to vary than that in thecase of a normal driving method with a frame frequency of about 60 Hz.

Another factor in changing the electric field applied to the liquidcrystal layer is a leakage current through the liquid crystal element111. When a voltage is applied to the liquid crystal element 111, asmall amount of leakage current flows between the pixel electrode andthe first common electrode or between the pixel electrode and the secondcommon electrode through the liquid crystal layer; accordingly, theabsolute value of a voltage applied to the liquid crystal element 111decreases over time. Hence, in the case of the driving method with along interval between writing operations of image signals as in oneembodiment of the present invention, for example, the transmittance ismore likely to vary than that in the case of a normal driving methodwith a frame frequency of about 60 Hz.

However, in the liquid crystal display device of one embodiment of thepresent invention, a negative liquid crystal material is used for theliquid crystal layer of the liquid crystal element 111, and the specificresistivity of the liquid crystal material is greater than or equal to1.0×10¹³ Ω·cm and less than or equal to 1.0×10¹⁶ Ω·cm, preferablygreater than or equal to 1.0×10¹⁴ Ω·cm and less than or equal to1.0×10¹⁶ Ω·cm. Note that the specific resistivity of the liquid crystalmaterial in this specification and the like is measured at 20° C.

A negative liquid crystal material is used for the liquid crystal layerin the liquid crystal element 111, so that change in the transmittanceof the liquid crystal clement 111 can be reduced. Furthermore, thespecific resistivity of the liquid crystal material is set within theabove range, so that leakage current flowing through the liquid crystalelement 111 can be reduced.

The transmittance of the liquid crystal element 111 varies depending onthe polarity (the positive (+) or negative (−) polarity) applied to theliquid crystal layer. For example, a difference in transmittances due todifferent polarities in the case of using a positive liquid crystalmaterial for the material of the liquid crystal layer in the liquidcrystal element 111 might be different from a difference intransmittances due to different polarities in the case of using anegative liquid crystal material. Here, the difference in transmittancesdepending on the polarity is described with reference to FIGS. 2A and2B. Note that the positive liquid crystal material is a liquid crystalmaterial with a positive dielectric anisotropy and the negative liquidcrystal material is a liquid crystal material with a negative dielectricanisotropy.

FIG. 2A shows transmittance-voltage characteristics in the case of usinga positive liquid crystal material (MLC-7030 produced by Merck) and FIG.2B shows transmittance-voltage characteristics in the case of using anegative liquid crystal material (MLC-3006 produced by Merck). As to thephysical properties of the positive liquid crystal material shown inFIG. 2A, the dielectric constant anisotropy Δϵ is 3.8 and theresistivity ρ is 4.9×10¹⁴ Ω·cm. As to the physical properties of thenegative liquid crystal material shown in FIG. 2B, the dielectricconstant anisotropy Δϵ is −3.0 and the resistivity ρ is 1.8×10¹³ Ω·cm.Note that in FIGS. 2A and 2B, the horizontal axis represents voltage(V); the vertical axis represents transmittance (%); the solid linerepresents transmittance in the case where the positive (+) polarity isapplied; and the dashed line represents transmittance in the case wherethe negative (−) polarity is applied.

FIGS. 2A and 2B indicate that a difference in transmittances dependingon the polarity applied to the liquid crystal layer is small in the caseof using the negative liquid crystal material. This is probably causedby a flexo-electric effect. The flexo-electric effect is a phenomenon inthat spontaneous polarization is induced by deformation. Theflexo-electric effect mainly depends on the shape of a molecule.

For example, a nematic liquid crystal exhibits spontaneous polarizationunder splay or bend deformation. To liquid crystal molecules themselves,the polarity of an applied voltage docs not essentially make adifference, but spontaneous polarization tends to exhibit oppositebehaviors based on the polarities of an electric field. This probablyproduces a difference in transmittances depending on the polarity. Theflexo-electric polarization P that is caused by the flexo-electriceffect is expressed by Formula (1) below.

{right arrow over (P)}=e _(splay)({right arrow over (n)}∇·{right arrowover (n)})+e _(bend)({right arrow over (n)}×∇×{right arrow over(n)})  (1)

Here, e represents the flexoelectric coefficient mainly based onmolecular shape, and n represents the liquid crystal director. Thepolarization is expressed as a product of the flexoelectric coefficientand the deformation.

Accordingly, to prevent occurrence of polarization and reduce flickers,it is preferable that the flexo-coefficient or the distortion oforientation be small.

The results of FIGS. 2A and 2B indicate that the distortion oforientation caused by the flexo-electric effect can be made small withthe use of a negative liquid crystal material.

In the liquid crystal display device of one embodiment of the presentinvention, driving of the liquid crystal element 111 is controlled bythe pixel electrode, the first common electrode, and the second commonelectrode. A method for driving the liquid crystal element 111 isdescribed below with reference to FIG. 1B.

FIG. 1B is a cross-sectional view illustrating an example of the liquidcrystal element 111 in the liquid crystal display device of oneembodiment of the present invention.

The liquid crystal element 111 includes a first common electrode 122over a substrate 120; an insulating layer 124 over the first commonelectrode 122; a pixel electrode 126 over the insulating layer 124; aliquid crystal layer 134 over the insulating layer 124 and the pixelelectrode 126; a second common electrode 132 over the liquid crystallayer 134; and a substrate 130 over the second common electrode 132. Asin FIG. 1B, the pixel electrode 126 is in contact with the insulatinglayer 124, and the insulating layer 124 is in contact with the firstcommon electrode 122. Note that the first common electrode 122, theinsulating layer 124, and the pixel electrode 126 are formed over thesubstrate 120, and the second common electrode 132 is formed under thesubstrate 130. That is, the liquid crystal layer 134 is sandwichedbetween the substrate 120 and the substrate 130. In FIG. 1B, pluralpixel electrodes 126 are illustrated because openings (slits) are formedover the insulating layer 124.

In the cross-sectional view of FIG. 1B, the liquid crystal element 111 aincludes the first common electrode 122, the pixel electrode 126, andthe liquid crystal layer 134. By application of voltage between thefirst common electrode 122 and the pixel electrode 126, orientation ofthe liquid crystal layer 134 in the liquid crystal element 111 a can becontrolled. The liquid crystal element 111 b includes the second commonelectrode 132, the pixel electrode 126, and the liquid crystal layer134. By application of voltage between the second common electrode 132and the pixel electrode 126, orientation of the liquid crystal layer 134in the liquid crystal clement 111 b can be controlled. Furthermore,orientation of the liquid crystal layer 134 in the liquid crystalelement 111 c can be controlled by application of voltage between thefirst common electrode 122 and the second common electrode 132. Thecapacitor 113 illustrated in FIG. 1A includes the first common electrode122, the insulating layer 124, and the pixel electrode 126. Theinsulating layer 124 serves as a dielectric layer of the capacitor 113.

In the cross-sectional view of FIG. 1B, voltage applied to the liquidcrystal layer 134 is schematically shown by arrows.

For example, 5.5 V is applied to the pixel electrode 126; 0 V, the firstcommon electrode 122; and 0.8 V, the second common electrode 132, sothat the liquid crystal element 111 illustrated in FIG. 1B can bedriven. In this case, a potential difference between the first commonelectrode 122 and the second common electrode 132 is 0.8 V; thus, aninfluence of an electric field of the liquid crystal element 111 cillustrated in FIG. 1B is small. In contrast, a potential differencebetween the first common electrode 122 and the pixel electrode 126 is5.5 V, and a potential difference between the pixel electrode 126 andthe second common electrode 132 is 4.7 V. Thus, the orientation ofliquid crystal in the liquid crystal layer 134 is controlled by thepotential difference between the first common electrode 122 and thepixel electrode 126. Furthermore, the potential applied to the secondcommon electrode 132 can assist the first common electrode 122 and thepixel electrode 126 to control the orientation of the liquid crystalelement 111. Therefore, it is preferable that the first common electrode122 and the second common electrode 132 be connected to different powersupply lines so as to controll potentials independently.

Thus, the potential difference between the first common electrode 122and the second common electrode 132 is smaller than the potentialdifference between the first common electrode 122 and the pixelelectrode 126, whereby change in the transmittance of the liquid crystallayer 134 can be made small.

It is preferable that a negative liquid crystal material with aresistivity of greater than or equal to 1.0×10¹³ Ω·cm and less than orequal to 1.0×10¹⁶ Ω·cm be used for the liquid crystal layer 134 of theliquid crystal element 111.

As described above, the liquid crystal layer 134 is controlled by threeelectrodes (the first common electrode 122, the pixel electrode 126, andthe second common electrode 132). and a negative liquid crystal materialis used for the liquid crystal layer 134, so that change in thetransmittance of the liquid crystal layer 134 can be made small andthus, occurrence of perceivable flickers can be prevented. This is anexcellent effect that can be achieved only by one embodiment of thepresent invention.

Moreover, in the liquid crystal display device of one embodiment of thepresent invention, the voltage V_(LC1) of the liquid crystal element 111can be held by the capacitor 113, which results in a reduction in thearea of the capacitor 113. In other words, the perception of flicker canbe prevented while the area of the capacitor 113 is reduced.Accordingly, high-definition pixels are achieved and the intervalbetween writing operations of image signals can be increased; it is thuspossible to provide an eye-friendly liquid crystal display device thatgives less eye fatigue to a user.

Configuration Example of Panel

Next, description will be made on a configuration example of a panelwhich corresponds to one embodiment of the liquid crystal displaydevice.

In a panel 230 illustrated in FIG. 3, a pixel portion 231 includes aplurality of pixels 100, wirings GL (wirings GL1 to GLy, y: a naturalnumber) for selecting the pixels 100 in each row, and wirings SL(wirings SL1 to SLx, x: a natural number) for supplying image signals tothe selected pixels 100. A driver circuit 232 controls the input ofsignals to the wirings GL, and a driver circuit 233 controls the inputof image signals to the wirings SL. Each of the plurality of pixels 100is connected to at least one of the wirings GL and at least one of thewirings SL.

Note that the kinds and number of the wirings in the pixel portion 231can be determined by the structure, number, and arrangement of thepixels 100. Specifically, in the pixel portion 231 illustrated in FIG.3, the pixels 100 are arranged in a matrix of x columns and y rows, andthe wirings SL1 to SLx and the wirings GL1 to GLy are provided in thepixel portion 231.

In one embodiment of the present invention, since the driver circuit 232and the driver circuit 233 are operated intermittently, the number oftimes of writing image signals to the pixel portion 231 can be greatlyreduced while the image is continuously displayed. For example, by usinga highly purified oxide semiconductor for a channel formation region ofthe transistor 112, the length of a frame period can be made longer thanor equal to 10 seconds, preferably larger than or equal to 30 seconds,and more preferably longer than or equal to one minute. Accordingly, thedrive frequency of the driver circuit 232 and the driver circuit 233 canbe significantly reduced, leading to a reduction in the powerconsumption of the liquid crystal display device.

Note that in one embodiment of the present invention, it is possible toemploy dot sequential driving in which image signals are sequentiallyinput from the driver circuit 233 to the wirings SL1 to SLx, or linesequential driving in which image signals are concurrently input fromthe driver circuit 233 to the wirings SL1 to SLx. Alternatively, theliquid crystal display device of one embodiment of the present inventionmay employ a driving method in which image signals are sequentiallyinput to every plural wirings SL.

The selection of the wirings GL may be performed by either progressivescan or interlaced scan.

Note that the response time of a liquid crystal from application ofvoltage to saturation of the change in transmittance is generally aboutten milliseconds. Thus, the slow response of the liquid crystal tends tobe perceived as a blur of a moving image. As a countermeasure, oneembodiment of the present invention may employ overdriving in which avoltage applied to the liquid crystal element 111 is temporarilyincreased so that alignment of the liquid crystal is changed quickly. Byoverdriving, the response speed of the liquid crystal can be increased,a blur of a moving image can be prevented, and the quality of the movingimage can be improved.

Further, if the transmittance of the liquid crystal element 111 keepschanging without reaching a constant value after the transistor 112 isturned off, the relative dielectric constant of the liquid crystal alsochanges; accordingly, the voltage held in the liquid crystal element 111easily changes. In particular, in the case where the capacitor 113connected to the liquid crystal element 111 has small capacitance as inone embodiment of the present invention, the change in the voltage heldin the liquid crystal element 111 tends to occur remarkably. However, bythe overdriving, the response time can be shortened and therefore thechange in the transmittance of the liquid crystal element 111 after thetransistor 112 is turned off can be made small. Hence, even in the casewhere the capacitor 113 connected in parallel to the liquid crystalelement 111 has small capacitance, it is possible to prevent the changein the voltage held in the liquid crystal element 111 after thetransistor 112 is turned off.

Since a negative liquid crystal material with a resistivity of greaterthan or equal to 1.0×10¹³ Ω·cm and less than or equal to 1.0×10¹⁶ ·cm isused for the liquid crystal element 111, voltage held in the liquidcrystal element 111 can be prevented from varing after the transistor112 is turned off.

Configuration Example of Structure of Liquid Crystal Display Device

Next, description will be made on a configuration example of the liquidcrystal display device of one embodiment of the present invention.

FIG. 4 is a block diagram illustrating an example of the structure ofthe liquid crystal display device of one embodiment of the presentinvention. A liquid crystal display device 240 illustrated in FIG. 4includes the panel 230 provided with the plurality of pixels 100 in thepixel portion 231, a controller 241, and a power source circuit 247. Theliquid crystal display device 240 illustrated in FIG. 4 also includes aninput device 242, a CPU 243, an image processing circuit 244, and animage memory 245. Also in the liquid crystal display device 240illustrated in FIG. 4, the driver circuit 232 and the driver circuit 233are provided in the panel 230.

Note that the controller 241 has a function of supplying the panel 230with various driving signals for controlling the operation of the drivercircuit 232, the driver circuit 233, or the like. Examples of thedriving signals include a start pulse signal for controlling theoperation of the driver circuit 233, a clock signal for the drivercircuit 233, a start pulse signal for controlling the operation of thedriver circuit 232, and a clock signal for the driver circuit 232.

The input device 242 has a function of applying data or an instructionto the CPU 243 included in the liquid crystal display device 240. Forexample, an instruction to transfer the panel 230 from an operationstate to a non-operation state, or an instruction to transfer the pixelportion 231 from a non-operation state to an operation stale can begiven to the CPU 243 by the input device 242. As the input device 242, akeyboard, a pointing device, a touch panel, or the like can be used.

The CPU 243 has a function of decoding an instruction input from theinput device 242 and executing the instruction by totally controllingthe operation of various circuits included in the liquid crystal displaydevice 240.

For example, in the case where the instruction to transfer the pixelportion 231 from the operation state to the non-operation state is sentfrom the input device 242, the CPU 243 gives an instruction to thecontroller 241 to stop the supply of a power source voltage Vp from thepower source circuit 247 to the pixel portion 231, and to stop thesupply of a driving signal to the panel 230.

In the case where an instruction to transfer the pixel portion 231 fromthe non-operation state to the operation state is sent from the inputdevice 242, the CPU 243 gives the instruction to the controller 241 torestart the supply of the power source voltage Vp from the power sourcecircuit 247 to the pixel portion 231, and to restart the supply of thedriving signal to the panel 230.

The image memory 245 has a function of storing data 246 which has imagedata and is input to the liquid crystal display device 240. Note thatalthough just one image memory 245 is provided in the liquid crystaldisplay device 240 in FIG. 4, a plurality of image memories 245 may beprovided in the liquid crystal display device 240. For example, in thecase where a full-color image is displayed on the pixel portion 231 withthe use of three pieces of data 246 corresponding to hues such as red,blue, and green, the image memory 245 corresponding to the data 246 ofeach hue may be provided.

As the image memory 245, for example, memory circuits such as a dynamicrandom access memory (DRAM) or a static random access memory (SRAM) canbe used. Alternatively, a video RAM (VRAM) may be used as the imagememory 245.

The image processing circuit 244 has a function of writing and readingthe data 246 to and from the image memory 245 in response to aninstruction from the controller 241 and generating an image signal fromthe data 246.

The power source circuit 247 has a function of supplying the powersource voltage Vp to the panel 230 and supplying the potential V_(COM1)and the potential V_(COM2) to the pixel 100.

Top View of Pixel

FIG. 5 is an example of a top view of the pixel 100 illustrated in FIG.1A. In FIG. 5, some components (e.g., a gate insulating film) are notillustrated for clarity of the top view of the pixel 100. FIG. 6 is across-sectional view taken along the dashed-dotted line A1-A2 and thedashed-dotted line A3-A4 in FIG. 5.

In the pixel 100 illustrated in FIG. 5 and FIG. 6, a conductive film 304serving as the gate of the transistor 112 and the wiring GL is providedover the substrate 302 having an insulating surface. In addition, afirst common electrode 318 serving as an electrode of the capacitor 113and the first common electrode is provided over the substrate 302. Thatis, the potential V_(COM1) is applied to the first common electrode 318.

An insulating film 306 is provided over the substrate 302 to cover theconductive film 304. An oxide semiconductor film 308 serving as achannel formation region of the transistor 112 is provided over theinsulating film 306 in a region overlapping with the conductive film304. A conductive film 310 and a conductive film 312 are formed over theoxide semiconductor film 308. A conductive film 313 formed in the samestep as the conductive films 310 and 312 is provided over the insulatingfilm 306. The conductive film 310 serves as the wiring SL and one of thesource and drain of the transistor 112. The conductive film 312 servesas the other of the source and drain of the transistor 112. Theconductive film 313 serves as a capacitor line.

An insulating film 314 is provided over the insulating film 306, theoxide semiconductor film 308, and the conductive films 310, 312, and313. An insulating film 316 serving as a planarization film is providedover the insulating film 314. An opening 360 reaching the conductivefilm 312 is formed in the insulating films 314 and 316. In addition, anopening 362 reaching the conductive film 313 is formed in the insulatingfilms 314 and 316.

The first common electrode 318 is provided over the insulating film 316.The first common electrode 318 is connected to the conductive film 313through the opening 362. An insulating film 320 is provided over theinsulating film 316 and the first common electrode 318. A pixelelectrode 322 is provided over the insulating film 320 in a positionoverlapping with the first common electrode 318. The insulating film 320has an opening 364 in a region overlapping with the opening 360. Theconductive film 312 and the pixel electrode 322 are connected to eachother through the openings 360 and 364. As in the top view of FIG. 5,the pixel electrode 322 has openings (slits). An alignment film 324 isprovided over the insulating film 320 and the pixel electrode 322.

A substrate 330 is provided to face the substrate 302. A light-blockingfilm 332 having a function of blocking visible light, a color film 334transmitting visible light within a certain wavelength range, aninsulating film 336 in contact with the light-blocking film 332 and thecolor film 334, a second common electrode 338 in contact with theinsulating film 336, and an alignment film 340 in contact with thesecond common electrode 338 are provided under the substrate 330. Theinsulating film 336 has a function of preventing the shapes of thesurfaces of the light-blocking film 332 and the color film 334 fromaffecting the planarity of the second common electrode 338 or thealignment film 340. Note that a structure in which the insulating film336 is not provided may be employed.

Between the substrate 302 and the substrate 330, a liquid crystal layer350 containing a liquid crystal material is interposed between thealignment film 324 and the alignment film 340. The liquid crystalelement 111 includes at least the first common electrode 318, theinsulating film 320, the pixel electrode 322, the second commonelectrode 338, and the liquid crystal layer 350. Note that a negativeliquid crystal material is used for the liquid crystal layer 350, andthe specific resistivity of the liquid crystal material is greater thanor equal to 1.0×10¹³ Ω·cm and less than or equal to 1.0×10¹⁶ Ω·cm.

Manufacturing Method

An example of a method for manufacturing the pixel illustrated in FIG. 6is described with reference to FIGS. 7A to 7D and FIGS. 8A to 8D.

As illustrated in FIG. 7A, a conductive film is formed over thesubstrate 302 and processed by etching or the like, whereby theconductive film 304 is formed. Next, the insulating film 306 is formedover the conductive film 304, and an oxide semiconductor film is formedover the insulating film 306. The oxide semiconductor film is processedby etching or the like into the oxide semiconductor film 308 with aseparated island shape in a region overlapping with the conductive film304.

The substrate 302 is preferably a substrate having heat resistance highenough to withstand a later manufacturing step; for example, a glasssubstrate, a ceramic substrate, a quartz substrate, or a sapphiresubstrate.

The conductive film 304 may be formed using a single layer or a stackedlayer of a conductive film containing one or more kinds selected fromaluminum, titanium, chromium, cobalt, nickel, copper, yttrium,zirconium, molybdenum, ruthenium, silver, tantalum, and tungsten. Forexample, the conductive film 304 may be a conductive film in which acopper film is stacked over a tungsten nitride film or a single-layertungsten film.

The insulating film 306 may be formed using a single layer or a stackedlayer of an insulating film containing one or more kinds of aluminumoxide, magnesium oxide, silicon oxide, silicon oxynitride, siliconnitride oxide, silicon nitride, gallium oxide, germanium oxide, yttriumoxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide,and tantalum oxide.

For example, in the case where the insulating film 306 has a two-layerstructure, a silicon nitride film and a silicon oxide film may be usedas the first layer and the second layer, respectively. A siliconoxynitride film may be used as the second layer instead of the siliconoxide film. A silicon nitride oxide film may be used as the first layerinstead of the silicon nitride film.

As the silicon oxide film, a silicon oxide film with a low defectdensity is preferably used. Specifically, a silicon oxide film which hasa spin density of 3×10¹⁷ spins/cm³ or less, preferably 5×10¹⁶ spins/cm³or less corresponding to a signal at a g-factor of 2.001 in electronspin resonance (HSR) spectroscopy is used. As the silicon oxide film, asilicon oxide film having excess oxygen is preferably used. As thesilicon nitride film, a silicon nitride film from which hydrogen andammonia are less released is used. The amount of released hydrogen andammonia is preferably measured by thermal desorption spectroscopy (TDS)analysis.

A material that can be used for the oxide semiconductor film 308 isdescribed in detail in Embodiment 2. When The oxide semiconductor filmused as the oxide semiconductor film 308 contains a large amount ofhydrogen, the hydrogen and the oxide semiconductor are bonded to eachother, so that part of the hydrogen becomes donors and generateselectrons serving as carriers. As a result, the threshold voltage of thetransistor shifts in the negative direction. Therefore, it is preferablethat, after forming the oxide semiconductor film, dehydration treatment(dehydrogenation treatment) be performed to remove hydrogen or moisturefrom the oxide semiconductor film so that the oxide semiconductor filmcontains impurities as little as possible.

Note that oxygen in the oxide semiconductor film is also reduced by thedehydration treatment (dehydrogenation treatment) in some cases.Accordingly, it is preferable that oxygen be added to the oxidesemiconductor film to fill oxygen vacancies increased by the dehydrationtreatment (dehydrogenation treatment).

In this manner, hydrogen or moisture is removed from the oxidesemiconductor film by the dehydration treatment (dehydrogenationtreatment) and oxygen vacancies therein are filled by the oxygen addingtreatment, whereby the oxide semiconductor film can be turned into ani-type (intrinsic) oxide semiconductor film or a substantially i-type(intrinsic) oxide semiconductor film which is extremely close to ani-type oxide semiconductor film.

Next, a conductive film is formed over the insulating film 306 and theoxide semiconductor film 308 and processed by etching or the like,whereby the conductive films 310 and 312 in contact with the oxidesemiconductor film 308 are formed, as illustrated in FIG. 7B. Theconductive film 313 is formed over the insulating film 306 in the samestep as the conductive films 310 and 312.

The conductive films 310, 312, and 313 are formed to have a single-layerstructure or a stacked-layer structure including any of metals such asaluminum, titanium, chromium, nickel, copper, yttrium, zirconium,molybdenum, silver, tantalum, and tungsten or an alloy containing any ofthese metals as its main component. As examples of the stacked-layerstructure, a two-layer structure in which a titanium film is stackedover an aluminum film, a two-layer structure in which a titanium film isstacked over a tungsten film, a two-layer structure in which a copperfilm is formed over a copper-magnesium-aluminum alloy film, athree-layer structure in which a titanium film or a titanium nitridefilm, an aluminum film or a copper film, and a titanium film or atitanium nitride film are stacked in this order, and a three-layerstructure in which a molybdenum film or a molybdenum nitride film, analuminum film or a copper film, and a molybdenum film or a molybdenumnitride film are stacked in this order are given. Note that atransparent conductive material containing indium oxide, tin oxide, orzinc oxide may be used. The conductive film can be formed by asputtering method, for example.

Next, as in FIG. 7C, the insulating film 314 is formed over theinsulating film 306, the oxide semiconductor film 308, and theconductive films 310, 312, and 313.

For example, the silicon oxide film or the silicon oxynitride film whichis used as the insulating film 314 can be formed under the followingconditions: the substrate placed in a treatment chamber of a plasma CVDapparatus, which is vacuum-evacuated, is held at a temperature higherthan or equal to 180° C. and lower than or equal to 400° C., preferablyhigher than or equal to 200° C. and lower than or equal to 370° C., thepressure in the treatment chamber is greater than or equal to 30 Pa andless than or equal to 250 Pa, preferably greater than or equal to 40 Paand less than or equal to 200 Pa with introduction of a source gas intothe treatment chamber, and high-frequency power is supplied to anelectrode provided in the treatment chamber.

The source gas of the insulating film 314 is preferably a deposition gascontaining silicon and an oxidizing gas. Typical examples of thedeposition gas containing silicon include silane, disilane, trisilane,and silane fluoride. Examples of the oxidizing gas include oxygen,ozone, dinitrogen monoxide, and nitrogen dioxide.

In this embodiment, the insulating film 314 has a stacked-layerstructure of a first insulating film and a second insulating film. Forexample, as the first insulating film, a 50-nm-thick silicon oxynitridefilm is formed by a plasma CVD method under the following conditions:silane with a flow rate of 20 sccm and dinitrogen monoxide with a flowrale of 3000 sccm are used as the source gases, the pressure in thetreatment chamber is 40 Pa, the substrate temperature is 220° C., and ahigh-frequency power of 100 W is supplied to parallel plate electrodeswith a high-frequency power supply of 27.12 MHz. Note that a plasma CVDapparatus is a parallel plate plasma CVD apparatus in which theelectrode area is 6000 cm², and power per unit area (power density) intowhich supplied power is converted is 1.6×10⁻² W/cm². Under the aboveconditions, a silicon oxynitride film that pastes oxygen can be formed.

As the second insulating film, a silicon oxide film or a siliconoxynitride film is formed under the following conditions: the substrateplaced in a treatment chamber of the plasma CVD apparatus that isvacuum-evacuated is held at a temperature higher than or equal to 180°C. and lower than or equal to 260° C., preferably higher than or equalto 180° C. and lower than or equal to 230° C., the pressure is greaterthan or equal to 100 Pa and less than or equal to 250 Pa preferablygreater than or equal to 100 Pa and less than or equal to 200 Pa withintroduction of a source gas into the treatment chamber, and ahigh-frequency power of 0.17 W/cm² to 0.5 W/cm², preferably 0.25 W/cm²to 0.35 W/cm² is supplied to an electrode provided in the treatmentchamber.

As the deposition conditions of the second insulating film, the high-frequency power having the power density is supplied to the electrodein the treatment chamber having the pressure, so that the degradationefficiency of the source gas in plasma is increased, oxygen radicals areincreased, and oxidation of the source gas is promoted. Thus, the oxygencontent in the second insulating film becomes higher than that in thestoichiometric composition. However, in the case where the substratetemperature is within the above temperature range, the bond betweensilicon and oxygen is weak; thus, part of oxygen is released by heating.Accordingly, it is possible to form an oxide insulating film whichcontains oxygen at a higher proportion than the stoichiometriccomposition and from which part of oxygen is released by heating.

In this embodiment, as the second insulating film, a 400-nm-thicksilicon oxynitride film is formed by a plasma CVD method under thefollowing conditions: silane with a flow rale of 160 sccm and dinitrogenmonoxide with a flow rate of 4000 sccm are used as the source gases, thepressure in the treatment chamber is 200 Pa, the substrate temperatureis 220° C., and a high-frequency power of 1500 W is supplied to parallelplate electrodes with a high-frequency power supply of 27.12 MHz. Notethat a plasma CVD apparatus is a parallel plate plasma CVD apparatus inwhich the electrode area is 6000 cm², and power per unit area (powerdensity) into which supplied power is converted is 2.5×10⁻¹ W/cm².

It is preferable that heat treatment be performed at least after theformation of the insulating film 314 so that oxygen contained in theinsulating film 314 enters the oxide semiconductor film 308 to filloxygen vacancies in the oxide semiconductor film 308.

Next, as in FIG. 7D, a desired region in the insulating film 314 isprocessed, whereby the opening 360 reaching the conductive film 312 andthe opening 362 reaching the conductive film 313 are formed.

The openings 360 and 362 are formed, for example, by a dry etchingmethod or a wet etching method. Alternatively, the openings 360 and 362may be formed by a combination of a dry etching method and a wet etchingmethod.

Next, as in FIG. 8A, the insulating film 316 having an opening isformed. The insulating film 316 has openings in positions correspondingto the openings 360 and 362. The insulating film 316 which serves as abase film for the first common electrode 318 has a function ofpreventing a transistor, a conductive film, or the like from formingunevenness on the first common electrode 318. That is, the insulatingfilm 316 has a function as a planarization film. For the insulating film316, an acrylic resin, a polyimide resin, or the like can be used.

Next, as in FIG. 8B, the first common electrode 318 is formed over theinsulating film 316. Then, the insulating film 320 is formed to coverthe insulating film 316 and the first common electrode 318. The firstcommon electrode 318 is connected to the conductive film 313 through theopening 362.

For example, a conductive film containing any of the followings can beused as the first common electrode 318: indium oxide containing tungstenoxide; indium zinc oxide containing tungsten oxide; indium oxidecontaining titanium oxide; indium tin oxide containing titanium oxide;indium tin oxide; indium zinc oxide; and indium tin oxide to whichsilicon oxide is added. The first common electrode 318 can be formed bya sputtering method.

As the insulating film 320, a silicon oxide film, a silicon oxynitridefilm, a silicon nitride film, a silicon nitride oxide film, or the likecan be used. In particular, a silicon nitride film or a silicon nitrideoxide film is preferably used as the insulating film 320 because theinsulating film 320 has a function as a dielectric of a capacitor and afunction as a protection film for the transistor.

For example, a silicon nitride film, a silicon nitride oxide film, orthe like having a thickness of from 50 nm to 400 nm can be used as theinsulating film 320. In this embodiment, a silicon nitride film having athickness of 100 nm is used as the insulating film 320.

The silicon nitride film is preferably formed at a high temperature tohave an improved blocking property; for example, the silicon nitridefilm is preferably formed at a temperature in the range from thesubstrate temperature of 100° C. to the strain point of the substrate,more preferably at a temperature in the range from 300° C. to 400° C.Note that in the case where the silicon nitride film is formed at a hightemperature, a phenomenon in which oxygen is released from the oxidesemiconductor film 308 and the carrier concentration is increased iscaused in some cases; therefore, the upper limit of the temperature is atemperature at which the phenomenon is not caused.

Next, as in FIG. 8C, the opening 364 is formed in the insulating film320. The opening 364 is formed in a position corresponding to theopening 360 formed in the insulating film 316. The opening 364 is formedto expose the conductive film 312. The method for forming the openings360 and 362 can be referred to for a method for forming the opening 364.

Next, as in FIG. 8D, the pixel electrode 322 is formed over theinsulating film 320. The pixel electrode 322 is connected to theconductive film 312 through the openings 360 and 364.

The pixel electrode 322 is formed in such a manner that a transparentconductive film is formed over the insulating film 320 and processed byetching or the like.

As the pixel electrode 322, a conductive film containing the followingcan be used: indium oxide containing tungsten oxide, indium zinc oxidecontaining tungsten oxide, indium oxide containing titanium oxide,indium tin oxide containing titanium oxide, indium tin oxide, indiumzinc oxide, indium tin oxide to which silicon oxide is added, or thelike.

Next, an alignment film 324 (not illustrated) is formed over theinsulating film 320 and the pixel electrode 322. The alignment film 324can be formed by a rubbing method, an optical alignment method, or thelike.

Through the above steps, the components formed over the substrate 302can be formed.

Next, a method for manufacturing a structure formed below the substrate330 facing the substrate 302 is described below.

First, the substrate 330 is prepared. For materials of the substrate330, the materials used for the substrate 302 can be referred to. Next,the light-blocking film 332 and the color film 334 which are in contactwith the substrate 330 are formed. The light-blocking film 332 and thecolor film 334 are each formed in a desired position with any of variousmaterials by a printing method, an inkjet method, an etching methodusing a photolithography technique, or the like.

Then, the insulating film 336 in contact with the light-blocking film332 and the color film 334 is formed, For the insulating film 336, anorganic insulating film of an acrylic resin or the like can be used.With the insulating film 336, an impurity or the like contained in thecolor film 334 can be prevented from diffusing into the liquid crystallayer 350 side, for example.

The second common electrode 338 in contact with the insulating film 336is formed. A conductive layer that can be used for the second commonelectrode 338 can be formed using a light-transmitting conductivematerial such as indium oxide containing tungsten oxide; indium zincoxide containing tungsten oxide; indium oxide containing titanium oxide;indium tin oxide containing titanium oxide; indium tin oxide(hereinafter referred to as ITO); indium zinc oxide; or indium tin oxideto which silicon oxide is added. The conductive layer that can be usedfor the second common electrode 338 can be formed by a sputteringmethod, for example.

Next, the alignment film 340 in contact with the second common electrode338 is formed. The method for forming the alignment film 324 can bereferred to for a method for forming the alignment film 340.

Through the above steps, the structure formed below the substrate 330can be formed.

After that, the liquid crystal layer 350 is formed between the substrate302 and the substrate 330. The liquid crystal layer 350 can be formed bya dispenser method (a dropping method), or an injecting method by whichliquid crystal is injected using a capillary phenomenon after thesubstrate 302 and the substrate 330 are bonded to each other.

Through the above steps, the pixel illustrated in FIG. 6 can be formed.

The structures, the methods, and the like described in this embodimentcan be combined as appropriate with any of the structures, the methods,and the like described in the other embodiments.

Embodiment 2

In this embodiment, an oxide semiconductor film that can be used in theliquid crystal display device of one embodiment of the present inventionis described.

A highly purified oxide semiconductor (a purified OS) obtained byreduction of impurities such as moisture or hydrogen that serve aselectron donors (donors) and reduction of oxygen vacancies is anintrinsic (i-type) semiconductor or a substantially intrinsicsemiconductor. Thus, a transistor including a channel formation regionin a highly purified oxide semiconductor film has extremely lowoff-state current and high reliability.

Specifically, various experiments can prove low off-state current of atransistor including a channel formation region in a highly purifiedoxide semiconductor film. For example, even when an clement has achannel width of 1×10⁶ μm and a channel length of 10 μm, off-statecurrent can be lower than or equal to the measurement limit of asemiconductor parameter analyzer, i.e., lower than or equal to 1×10⁻¹³A, at a voltage (drain voltage) between a source electrode and a drainelectrode of 1 V to 10 V. In that case, it can be seen that off-statecurrent normalized on the channel width of the transistor is lower thanor equal to 100 zA/μm. In addition, a capacitor and a transistor wereconnected to each other and off-state current was measured using acircuit in which electric charge flowing to or from the capacitor iscontrolled by the transistor. In the measurement, a highly purifiedoxide semiconductor film was used for the channel formation region ofthe transistor, and the off-state current of the transistor was measuredfrom a change in the amount of electric charge of the capacitor per unithour. As a result, it was found that, in the case where the voltagebetween the source electrode and the drain electrode of the transistoris 3 V, a lower off-state current of several tens of yoctoamperes permicrometer is obtained. Accordingly, the transistor using the highlypurified oxide semiconductor film for the channel formation region hasmuch lower off-state current than a crystalline silicon transistor.

Unless otherwise specified, in the case of an n-channel transistor, theoff-state current in this specification is a current that flows betweena source and a drain when the potential of a gate is lower than or equalto 0 with the potential of the source as a reference potential while thepotential of the drain is higher than those of the source and the gate.Meanwhile, in the case of a p-channel transistor, the off-state currentin this specification is a current that flows between a source and adrain when the potential of a gate is higher than or equal to 0 with thepotential of the source as a reference potential while the potential ofthe drain is tower than those of the source and the gate.

As the semiconductor film, at least indium (In) or zinc (Zn) ispreferably included as an oxide semiconductor. The oxide semiconductorpreferably contains, in addition to In and Zn, gallium (Ga) serving as astabilizer that reduces variations in electric characteristics amongtransistors using the above-described oxide semiconductor. Tin (Sn) ispreferably contained as a stabilizer. Hafnium (Hf) is preferablycontained as a stabilizer. Aluminum (Al) is preferably contained as astabilizer. Zirconium (Zr) is preferably contained as a stabilizer.

Among the oxide semiconductors, unlike silicon carbide, gallium nitride,or gallium oxide, an In—Ga—Zn-based oxide, an In—Sn—Zn-based oxide, orthe like has an advantage of high mass productivity because a transistorwith favorable electric characteristics can be formed by sputtering or awet process. Further, unlike silicon carbide, gallium nitride, orgallium oxide, the In—Ga—Zn-based oxide allows a transistor withfavorable electric characteristics to be formed over a glass substrate.Further, a larger substrate can be used.

As another stabilizer, one or plural kinds of lanthanoid such aslanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium(Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy),holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), or lutetium(Lu) may be contained.

As the oxide semiconductor, any of the following oxides can be used, forexample: indium oxide, gallium oxide, tin oxide, zinc oxide, In—Zn-basedoxide, Sn—Zn-based oxide, Al—Zn-based oxide, Zn—Mg-based oxide,Sn—Mg-based oxide, In—Mg-based oxide, In—Ga-based oxide, In—Ga—Zn-basedoxide (also referred to as IGZO). In—Al—Zn-based oxide, In—Sn—Zn-basedoxide, Sn—Ga—Zn-based oxide, Al—Ga—Zn-based oxide, Sn—Al—Zn-based oxide,In—Hf—Zn-based oxide, In—La—Zn-based oxide, In—Pr—Zn-based oxide,In—Nd—Zn-based oxide. In—Sm—Zn-based oxide, In—Eu—Zn-based oxide,In—Gd—Zn-based oxide, In—Tb—Zn-based oxide, In—Dy—Zn-based oxide,In—Ho—Zn-based oxide, In—Er—Zn-based oxide, In—Tm—Zn-based oxide,In—Yb—Zn-based oxide, In—Lu—Zn-based oxide, In—Sn—Ga—Zn-based oxide,In—Hf—Ga—Zn-based oxide, In—Al—Ga—Zu-based oxide, In—Sn—Al—Zn-basedoxide, In—Sn—Hf—Zn-based oxide, and In—Hf—Al—Zn-based oxide.

Note that, for example, an In—Ga—Zn-based oxide means an oxidecontaining In, Ga, and Zn, and there is no limitation on the ratio ofIn, Ga, and Zn. In addition, the In—Ga—Zn-based oxide may contain ametal clement other than In, Ga, and Zn. Further, the In—Ga—Zn-basedoxide may contain a metal element other than In, Ga, and Zn. TheIn—Ga—Zn-based oxide has sufficiently high resistance when no electricfield is applied thereto, so that off-state current can be sufficientlyreduced. Further, the In—Ga—Zn-based oxide has high mobility.

For example, an In—Ga—Zn-based oxide with an atomic ratio ofIn:Ga:Zn=1:1:1, In:Ga:Z=1:1:1.2 (=5:5:6), In:Ga:Zn=2:2:1; orIn:Ga:Zn=3:1:2, or an oxide with an atomic ratio close to the aboveatomic ratios can be used. Alternatively, an In—Sn—Zn-based oxide withan atomic ratio of In:Sn:Zn=1:1:1, In:Sn:Zn=2:1:3, or In:Sn:Zn=2:1:5, oran oxide with an atomic ratio close to the above atomic ratios may beused.

For example, with an In—Sn—Zn-based oxide, high mobility can be realizedrelatively easily. However, even with at In—Ga—Zn-based oxide, mobilitycan be increased by reducing the defect density in the bulk.

An oxide semiconductor film is classified roughly into a single-crystaloxide semiconductor film and a non-single-crystal oxide semiconductorfilm. The non-single-crystal oxide semiconductor film includes any of ac-axis aligned crystalline oxide semiconductor (CAAC-OS) film, apolycrystalline oxide semiconductor film, a microcrystalline oxidesemiconductor film, an amorphous oxide semiconductor film, and the like.

Here, the CAAC-OS film is described.

The CAAC-OS film is one of oxide semiconductor films including aplurality of crystal parts, and most of the crystal parts each fitinside a cube whose one side is less than 100 nm. Thus, there is a casewhere a crystal part included in the CAAC-OS film fits inside a cubewhose one side is less than 10 nm, less than 5 nm, or less than 3 nm.

In a transmission electron microscope (TEM) image of the CAAC-OS film, aboundary between crystal ports, that is, a grain boundary is not clearlyobserved. Thus, in the CAAC-OS film, a reduction in electron mobilitydue to the grain boundary is less likely to occur.

According to the TEM image of the CAAC-OS film observed in a directionsubstantially parallel to a sample surface (cross-sectional TEM image),metal atoms are arranged in a layered manner in the crystal parts. Eachmetal atom layer has a morphology reflected by a surface over which theCAAC-OS film is formed (hereinafter, a surface over which the CAAC-OSfilm is formed is referred to as a formation surface) or a top surfaceof the CAAC-OS film, and is arranged in parallel to the formationsurface or the top surface of the CAAC-OS film.

On the other hand, according to the TEM image of the CAAC-OS filmobserved in a direction substantially perpendicular to the samplesurface (plan TEM image), metal atoms are arranged in a triangular orhexagonal configuration in the crystal parts. However, there is noregularity of arrangement of metal atoms between different crystalparts.

In this specification, the term “parallel” indicates that the angleformed between two straight lines is greater than or equal to −10° andless than or equal to 10°, and accordingly also includes the case wherethe angle is greater than or equal to −5° and less than or equal to 5°.In addition, the term “perpendicular” indicates that the angle formedbetween two straight lines is greater than or equal to 80° and less thanor equal to 100°, and accordingly includes the case where the angle isgreater than or equal to 85° and less than or equal to 95°.

From the results of the cross-sectional TEM image and the plan TEMimage, alignment is found in the crystal parts in the CAAC-OS film.

A CA AC-OS film is subjected to structural analysis with an X-raydiffraction (XRD) apparatus. For example, when the CAAC-OS filmincluding an InCaZnO₄ crystal is analyzed by an out-of-plane method, apeak appears frequently when the diffraction angle (2θ) is around 31°.This peak is derived from the (009) plane of the InGaZnO₄ crystal, whichindicates that crystals in the CAAC-OS film have c-axis alignment, andthat the c-axes are aligned m a direction substantially perpendicular tothe formation surface or the top surface of the CAAC-OS film.

On the other hand, when the CAAC-OS film is analyzed by an in-planemethod in which an X-ray enters a sample in a direction substantiallyperpendicular to the c-axis. a peak appears frequently when 2θ around56°. This peak is derived from the (110) plane of the InGaZnO₄ crystal.Here, analysis (ϕ scan) is performed under conditions where the sampleis rotated around a normal vector of a sample surface as an axis (ϕaxis) with 2θ fixed at around 56°. In the case where the sample is asingle-crystal oxide semiconductor film of InGaZnO₄, six peaks appear.The six peaks are derived from crystal planes equivalent to the (110)plane. On the other hand, in the case of a CAAC-OS film, a peak is notclearly observed even when φ scan is performed with 2θ fixed at around56°.

According to the above results, in the CAAC-OS film having c-axisalignment, while the directions of a-axes and b-axes are differentbetween crystal parts, the c-axes are aligned in a direction parallel toa normal vector of a formation surface or a normal vector of a topsurface of the CAAC-OS film. Thus, each metal atom layer arranged in alayered manner observed in the cross-sectional TEM image corresponds toa plane parallel to the a-b plane of the crystal.

Note that the crystal part is formed concurrently with deposition of theCAAC-OS film or is formed through crystallization treatment such as heattreatment. As described above, the c-axis of the crystal is aligned in adirection parallel to a normal vector of a formation surface or a normalvector of a top surface. Thus, for example, in the case where a shape ofthe CAAC-OS film is changed by etching or the like, the c-axis might notbe necessarily parallel to a normal vector of a formation surface or anormal vector of a top surface of the CAAC-OS film.

Further, the degree of crystallinity in the CAAC-OS film is notnecessarily uniform. For example, in the case where crystal growthleading to the CAAC-OS film occurs from the vicinity of the top surfaceof the film, the degree of the crystallinity in the vicinity of the topsurface is higher than that in the vicinity of the formation surface insome cases. Further, when an impurity is added to the CAAC-OS film, thecrystallinity in a region to which the impurity is added is changed, andthe degree of crystallinity in the CAAC-OS film varies depending onregions.

Note that when the CAAC-OS film with an InGaZnO₄ crystal is analyzed byan out-of-plane method, a peak of 2θ may also be observed at around 36°,in addition to the peak of 2θ at around 31°. The peak of 2θ at around36° is derived from the (311) plane of a ZnGa₂O₄ crystal; such a peakindicates that a ZnGa₂O₄ crystal is included in part of the CAAC-OS filmincluding the InGaZnO₄ crystal. It is preferable that in the CAAC-OSfilm, a peak of 2θ appears at around 31° and a peak of 2θ do not appearat around 36°.

The CAAC-OS film is an oxide semiconductor film having low impurityconcentration. The impurity is an clement other than the main componentsof the oxide semiconductor film, and examples of the impurity includehydrogen, carbon, silicon, and a transition metal element. Inparticular, an element that has higher bonding strength to oxygen than ametal element included in the oxide semiconductor film, such as silicon,disturbs the atomic arrangement of the oxide semiconductor film bydepriving the oxide semiconductor film of oxygen and causes a decreasein crystallinity. Furthermore, a heavy metal such as iron or nickel,argon, carbon dioxide, or the like has a large atomic radius (molecularradius), and thus disturbs die atomic arrangement of the oxidesemiconductor film and causes a decrease in crystallinity when it iscontained in the oxide semiconductor film. Note that the impuritycontained in the oxide semiconductor film might serve as a carrier trapor a carrier generation source.

The CAAC-OS film is an oxide semiconductor film having a low density ofdefect states. In some cases, oxygen vacancies in the oxidesemiconductor film serve as carrier traps or serve as carrier generationsources when hydrogen is captured therein.

The state in which impurity concentration is low and density of defectstates is low (the number of oxygen vacancies is small) is referred toas a “highly purified intrinsic” or “substantially highly purifiedintrinsic” state. A highly purified intrinsic or substantially highlypurified intrinsic oxide semiconductor film has few carrier generationsources, and thus can have a low carrier density. Thus, a transistorincluding the oxide semiconductor film rarely has negative thresholdvoltage (is rarely normally on). The highly purified intrinsic orsubstantially highly purified intrinsic oxide semiconductor film has fewcarrier traps. Accordingly, the transistor including the oxidesemiconductor film has little variation in electric characteristics andhigh reliability. Electric charge trapped by the carrier traps in theoxide semiconductor film takes a long time to be released, and mightbehave like fixed electric charge. Thus, the transistor which includesthe oxide semiconductor film having high impurity concentration and ahigh density of defect states has unstable electric characteristics insome cases.

In a transistor using the CAAC-OS film, change in electriccharacteristics due to irradiation with visible light or ultravioletlight is small.

For example, the CAAC-OS film is formed by a sputtering method using apolycrystalline metal oxide target. When ions collide with the target, acrystal region included in the target may be separated from the targetalong an a-b plane; in other words, a sputtered particle having a planeparallel to an a-b plane (flat-plate-like sputtered particle orpellet-like sputtered particle) may flake off from the target. In thatcase, the flat-plate-like or pellet-like sputtered particle reaches asubstrate in the state of maintaining its crystal state, whereby theCAAC-OS film can be formed.

For the deposition of the CAAC-OS film, the following conditions arepreferably used.

By reducing the amount of impurities entering the CAAC-OS film duringthe deposition, the crystal state can be prevented from being broken bythe impurities. For example, the concentration of impurities (e.g.,hydrogen, water, carbon dioxide, and nitrogen) which exist in thetreatment chamber may be reduced. Furthermore, the concentration ofimpurities in a deposition gas may be reduced. Specifically, adeposition gas whose dew point is −80° C. or lower, preferably −100° C.or lower is used.

By increasing the substrate heating temperature during the deposition,migration of a sputtered particle is likely to occur after the sputteredparticle reaches a substrate surface. Specifically, the substrateheating temperature during the deposition is from 100° C. to 740° C.,preferably from 200° C. to 500° C. By increasing the substrate heatingtemperature during the deposition, when the flat-plate-like orpellet-like sputtered particle reaches the substrate, migration occurson the substrate surface, so that a flat plane of the sputteredparticles is attached to the substrate.

Furthermore, it is preferable that the proportion of oxygen in thedeposition gas be increased and the power be optimized in order toreduce plasma damage at the deposition. The proportion of oxygen in thedeposition gas is 30 vol % or higher, preferably 100 vol %.

The oxide semiconductor layer may have a stacked-layer structure.

Here, an example in which the oxide semiconductor film 308 used in thetransistor 112 illustrated in FIG. 6 has a stacked-layer structureincluding an oxide semiconductor film 307 and an oxide semiconductorfilm 309 is described with reference to FIGS. 9A and 9B.

FIG. 9A illustrates a cross-sectional structure in which the oxidesemiconductor film used in the transistor 112 has a stacked-layerstructure including the oxide semiconductor film 307 and the oxidesemiconductor film 309. Thus, the other components are the same as thoseof the transistor 112 illustrated in FIG. 6; hence, the abovedescription can be referred to.

Metal oxides used for the oxide semiconductor film 307 and the oxidesemiconductor film 309 preferably contain at least one same constituentelement. Alternatively, the constituent elements of the oxidesemiconductor film 307 may be the same as those of the oxidesemiconductor film 309 and the composition of the constituent elementsof the oxide semiconductor film 307 may be different from those of theoxide semiconductor film 309.

In the case where the oxide semiconductor film 307 is In-M-Zn oxide (Mrepresents Al, Ga, Ge, Y, Zr, Sn, La, Ce, or Hf), it is preferable thatthe atomic ratio of metal elements of a sputtering target used forforming a film of the In-M-Zn oxide satisfy In≥M and Zn≥M. As the atomicratio of metal elements of the sputtering target, In:M:Zn=1:1:1,In:M:Zn=5:5:6 (1:1:1.2), and In:M:Zn=3:1:2 are preferable. Note that theproportion of the atomic ratio of the oxide semiconductor film 307formed using the above-described sputtering target varies within a rangeof ±20% as an error.

When an In-M-Zn oxide is used for the oxide semiconductor film 307, theproportions of In and M, not taking Zn and O into consideration, ispreferably as follows; the atomic percentage of In is greater than orequal to 25 at. % and the proportion of M is less than 75 at. %; morepreferably, the proportion of In is greater than or equal to 34 at. %and the proportion of M is less than 66 at. %.

The energy gap of the oxide semiconductor film 307 is 2 eV or more,preferably 2.5 eV or more, further preferably 3 eV or more. Theoff-state current of the transistor 112 can be reduced by using an oxidesemiconductor having a wide energy gap.

The thickness of the oxide semiconductor film 307 is greater than orequal to 3 nm and less than or equal to 200 nm, preferably greater thanor equal to 3 nm and less than or equal to 100 nm, further preferablygreater than or equal to 3 nm and less than or equal to 50 nm.

The oxide semiconductor film 309 is typically In—Ga oxide, In—Zn oxide,or In-M-Zn oxide (M represents Al, Ga, Ge, Y, Zr, Sn, La, Ce, or Hf).The energy at the conduction band bottom thereof is closer to a vacuumlevel man that of the oxide semiconductor film 307 is, and typically,the difference between the energy al the conduction band bottom of theoxide semiconductor film 309 and the energy at the conduction bandbottom of the oxide semiconductor film 307 is any one of 0.05 eV ormore, 0.07 eV or more, 0.1 eV or more, and 0.15 eV or more, and any oneof 2 eV or less, 1 eV or less, 0.5 eV or less, and 0.4 eV or less. Thatis, the difference between the electron affinity of the oxidesemiconductor film 309 and the electron affinity of the oxidesemiconductor film 307 is greater than or equal to 0.05 eV, greater thanor equal to 0.07 eV, greater than or equal to 0.1 eV, or greater than orequal to 0.15 eV and also less than or equal to 2 eV, less than or equalto 1 eV, less than or equal to 0.5 eV, or less than or equal to 0.4 eV.

When the oxide semiconductor film 309 contains a larger amount of theelement M in an atomic ratio than the amount of In in an atomic ratio,any of the following effects may be obtained: (1) the energy gap of theoxide semiconductor film 309 is widened; (2) the electron affinity ofthe oxide semiconductor film 309 decreases; (3) an impurity from theoutside is blocked; (4) an insulating property increases as compared tothe oxide semiconductor film 307. Further, oxygen vacancies are lesslikely to be generated in the oxide semiconductor film 309 containing alarger amount of M in an atomic ratio than the amount of In in an atomicratio because M is a metal element which is strongly bonded to oxygen.

When an In-M-Zn oxide is used for the oxide semiconductor film 309, theproportions of In and Mt not taking Zn and O into consideration, ispreferably as follows: the atomic percentage of In is less than 50 at. %and the atomic percentage of M is greater than or equal to 50 at. %;further preferably, the atomic percentage of In is less than 25 at. %and the atomic percentage of M is greater than or equal to 75 at. %.

Further, in the case where each of the oxide semiconductor film 307 andthe oxide semiconductor film 309 is In-M-Zn oxide (M represents Al, Ga,Ge, Y, Zr, Sn, La, Ce, or Hf), the proportion of M atoms in the oxidesemiconductor film 309 is higher than the proportion of M atoms in theoxide semiconductor film 307. Typically, the proportion of M atoms inthe oxide semiconductor layer 309 is higher than or equal to 1.5 times,preferably higher than or equal to 2 times, further preferably higherthan or equal to 3 times as large as that in the oxide semiconductorfilm 307.

In the case where the oxide semiconductor film 309 has an atomic ratioof In to M and Zn which is x₁:y₁:z₁ and the oxide semiconductor film 307has an atomic ratio of In to M and Zn which is x₂:y₂:z₂, y₁/x₁ is largerthan y₂/x₂, preferably y₁/x₁ is 1.5 times or more as large as y₂/x₂. Itis further preferable that y₁/x₁ be twice or more as large as y₂/x₂. Itis still further preferable y₁/x₁ be three or more times as large asy₂/x₂. In this case, it is preferable that in the oxide semiconductorfilm, y₂ be higher than or equal to x₂ because the transistor 102including the oxide semiconductor film can have stable electriccharacteristics. However, when y₂ is larger than or equal to three ormore times x₂, the field-effect mobility of the transistor 102 includingthe oxide semiconductor film is reduced. Thus, it is preferable that y₂be lower than three times x₂.

Further, in the case where the oxide semiconductor film 309 is anIn-M-Zn oxide film, the atomic ratio of metal elements of a sputteringtarget used for forming the In-M-Zn oxide preferably satisfies M>In, andmore preferably, Zn also satisfies Zn≥M. As the atomic ratio of metalelements of the sputtering target, In:Ga:Zn=1:3:2, In:Ga:Zn=1:3:3,In:Ga:Zn=1:3:4, In:GaZn=1:3:5, In:Ga:Zn=1:3:6, In:Ga:Zn=1:3:7,In:Ga:Zn=1:3:8, In:Ga:Zn=1:3:9, In:Ga:Zn=1:3:10, In:Ga:Zn=1:6:4,In:Ga:Zn=1:6:5, In:Ga:Zn=1:6:6, In:Ga:Zn=1:6:7, In:Ga:Zn=1:6:8,In:Ga:Zn=1:6:9, and In:Ga:Zn=1:6:10 are preferable. Note that theproportion of each metal element in the atomic ratio of each of theoxide semiconductor film 307 and the oxide semiconductor film 309 formedusing the above-described sputtering target varies within a range of ±20% as an error.

Note that, without limitation to the compositions and materialsdescribed above, a material with an appropriate composition may be useddepending on required semiconductor characteristics and electricalcharacteristics (e.g., field-effect mobility and threshold voltage) of atransistor. Further, in order to obtain the required semiconductorcharacteristics of the transistor, it is preferable that the carrierdensity, the impurity concentration, the defect density, the atomicratio of a metal clement to oxygen, the interatomic distance, thedensity, and the like of the oxide semiconductor film 307 be set toappropriate values.

Note that the oxide semiconductor film 309 also functions as a filmwhich relieves damage to the oxide semiconductor film 307 at the time offorming the insulating film 314 later. The thickness of the oxidesemiconductor film 309 is greater than or equal to 3 nm and less than orequal to 100 nm, preferably greater than or equal to 3 nm and less thanor equal to 50 nm.

When silicon or carbon which is one of elements belonging to Group 14 iscontained in the oxide semiconductor film 307 in the transistor 112, thenumber of oxygen vacancies is increased, and the oxide semiconductorfilm 307 is changed to an n-type. Thus, the concentration of silicon orcarbon (the concentration is measured by SIMS) in the oxidesemiconductor film 307 or the concentration of silicon or carbon (theconcentration is measured by SIMS) in the vicinity of the interfacebetween the oxide semiconductor film 309 and the oxide semiconductorfilm 307 is set to be lower than or equal to 2×10¹⁸ atoms/cm³,preferably lower than or equal to 2×10¹⁷ atoms/cm³.

Further, the concentration of alkali metal or alkaline earth metal ofthe oxide semiconductor film 307, which is measured by SIMS, is lowerthan or equal to 1×10¹⁸ atoms/cm³, preferably lower than or equal to2×10¹⁶ atoms/cm³. Alkali metal and alkaline earth metal might generatecarriers when bonded to an oxide semiconductor, in which case theoff-state current of the transistor might be increased. Therefore, it ispreferable to reduce the concentration of alkali metal or alkaline earthmetal of the oxide semiconductor film 307.

Further, when nitrogen is contained in the oxide semiconductor film 307,electrons serving as carriers are generated to increase the carrierdensity, so that the oxide semiconductor film 307 easily becomes n-type.Thus, a transistor including an oxide semiconductor which containsnitrogen is likely to be normally on. For this reason, nitrogen in theoxide semiconductor film is preferably reduced as much as possible; theconcentration of nitrogen which is measured by SIMS is preferably setto, for example, lower than or equal to 5×10¹⁸ atoms/cm³.

Note that in the transistor 112 shown in FIG. 9A, the oxidesemiconductor film 309 is provided between the oxide semiconductor film307 and the insulating film 314. The oxide semiconductor film 307 ispositioned on the conductive film 304 (serving as a gate) side andserves as a main path of carriers. Hence, if trap states are formedbetween the oxide semiconductor film 309 and the insulating film 314owing to impurities and defects, electrons flowing in the oxidesemiconductor film 307 are less likely to be captured by the trap statesbecause there is a distance between the trap states and the oxidesemiconductor film 307. Accordingly, the amount of on-state current ofthe transistor 112 can be increased, and the field-effect mobility canbe increased. When the electrons are captured by the trap states, theelectrons become negative fixed charges. As a result, a thresholdvoltage of the transistor 112 fluctuates. However, by the distancebetween the oxide semiconductor film 307 and the trap states, capture ofthe electrons by the trap states can be reduced, and accordingly afluctuation of the threshold voltage can be reduced.

Note that the oxide semiconductor firm 307 and the oxide semiconductorfilm 309 are not formed by simply stacking each layer, but are formed toform a continuous junction (here, in particular, a structure in whichthe energy of the bottom of the conduction band is changed continuouslybetween each film). In other words, a stacked-layer structure in whichthere exist no impurity which forms a defect level such as a trap centeror a recombination center at each interface is provided. If an impurityexists between the oxide semiconductor film 307 and the oxidesemiconductor film 309 which are stacked, a continuity of the energyband is damaged, and the carrier is captured or recombined at theinterface and then disappears.

To form the continuous junction, each film needs to be stackedsuccessively without exposure to the atmosphere using a multi-chamberdeposition apparatus (sputtering apparatus) including a load lockchamber. Each chamber in the sputtering apparatus is preferablysubjected to high vacuum evacuation (to a vacuum of about 5×10⁻⁷ Pa to1×10⁻⁴ Pa) with use of a suction vacuum evacuation pump such as acryopump so that water or the like, which is an impurity for the oxidesemiconductor film, is removed as much as possible. Alternatively, aturbo-molecular pump is preferably used in combination with a cold trapto prevent backflow of gas, especially a gas containing carbon orhydrogen into the chamber through an evacuation system.

Here, a band structure of the stacked-layer structure included in thetransistor 112 is described with reference to FIG. 9B.

FIG. 9B schematically shows a part of the band structure included in thetransistor 112. Here, the case where silicon oxide layers are providedas the insulating film 306 and the insulating film 314 is shown. In FIG.9B, EcI1 denotes the energy of the bottom of the conduction band in thesilicon oxide layer used as the insulating film 306; EcS1 denotes theenergy of the bottom of the conduction band in the oxide semiconductorfilm 307; EcS2 denotes the energy of the bottom of the conduction bandin the oxide semiconductor film 309; and EcI2 denotes the energy of thebottom of the conduction band in the silicon oxide layer used as theinsulating film 314.

As shown in FIG. 9B, there is no energy barrier between the oxidesemiconductor film 307 and the oxide semiconductor film 309, and theenergy level of the bottom of the conduction band gradually changestherebetween. In other words, the energy level of the bottom of theconduction band is continuously changed. This is because the oxidesemiconductor film 307 contains an element contained in the oxidesemiconductor film 309 and oxygen is transferred between the oxidesemiconductor film 307 and the oxide semiconductor film 309, so that amixed layer is formed.

As shown in FIG. 9B, in the oxide semiconductor film 308, the oxidesemiconductor film 307 serves as a well; in the transistor including theoxide semiconductor film 308, a channel formation region is formed inthe oxide semiconductor film 307. Note that since the energy of thebottom of the conduction band of the oxide semiconductor film 308 iscontinuously changed, it can be said that the oxide semiconductor film307 and the oxide semiconductor film 309 have a continuous junction.

Although trap states due to defects or impurities such as silicon orcarbon, which is a constituent element of the insulating film 514, mightbe formed in the vicinity of the interface between the oxidesemiconductor film 309 and the insulating film 314 as shown in FIG. 9B,the oxide semiconductor film 307 can be distanced from the trap statesowing to existence of the oxide semiconductor film 309. However, whenthe energy difference between EcS1 and EcS2 is small, an electron in theoxide semiconductor film 307 might reach the trap state by passing overthe energy difference. When the electron is captured by the trap state,negative fixed electric charge is generated at the interface with theinsulating film, so that the threshold voltage of the transistor shiftsin the positive direction. Therefore, it is preferable that the energydifference between EcS1 and EcS2 be 0.1 eV or more, further preferably0.15 eV or more because a change in the threshold voltage of thetransistor is prevented and stable electric characteristics areobtained.

By using the above-described oxide semiconductor for a transistor in theliquid crystal display device of one embodiment of the presentinvention, display of images on a pixel portion can be maintained evenafter the writing of image signals to the pixel portion is stopped.Furthermore, by using the above transistor as an clement for controllingthe supply of voltage to a liquid crystal element included in the pixel,the voltage applied to the liquid crystal element can be held for a longtime.

The structures, the methods, and the like described in this embodimentcan be combined as appropriate with any of the structures, the methods,and the like described in the other embodiments.

Embodiment 3

In this embodiment, a configuration example of a pixel in a liquidcrystal display device of one embodiment of the present invention, whichis different from the pixel 100 illustrated in the top view of FIG. 5and the cross-sectional view of FIG. 6 in Embodiment 1, is describedwith reference to FIG. 10 and FIG. 11.

FIG. 10 is an example of a lop view of the pixel 100 illustrated in FIG.1A. In FIG. 10, some components (e.g., a gate insulating film) are notillustrated for clarity of the top view of the pixel 100. FIG. 11 is across-sectional view taken along the dashed-dotted line A1-A2 and thedashed-dotted line A3-A4 in FIG. 10.

In the pixel 100 illustrated in FIG. 10 and FIG. 11, a conductive film304 serving as the gate of the transistor 112 and the wiring GL isprovided over the substrate 302 having an insulating surface. Inaddition, an electrode 354 serving as an electrode of the capacitor 113and the first common electrode is provided over the substrate 302.

An insulating film 306 is provided over the substrate 302 to cover theconductive film 304. An oxide semiconductor film 308 serving as achannel formation region of the transistor 112 is provided over theinsulating film 306 in a region overlapping with the conductive film304. A conductive film 310 and a conductive film 312 are formed over theoxide semiconductor film 308. A conductive film 313 formed in the samestep as the conductive films 310 and 312 is provided over the electrode354 and the insulating film 306. The conductive film 310 serves as thewiring SL and one of the source and drain of the transistor 112. Theconductive film 312 serves as the other of the source and drain of thetransistor 112. The conductive film 313 serves as a capacitor line.

The electrode 354 is formed in the same step as the oxide semiconductorfilm 308. The electrode 354 is a conductive oxide semiconductor havinghigher electrical conductivity than the oxide semiconductor film 308.The electrode 354 is provided in contact with an insulating film 321 anddiffusion of hydrogen contained in the insulating film 321 into theelectrode 354 increases the electrical conductivity of the electrode354. In addition, a region in the electrode 354 in contacat with theconductive film 313 has high electrical conductivity because the regionis not in contact with the insulating film 314 and oxygen vacancies inthe oxide semiconductor are not filled. Accordingly, although theelectrode 354 is an oxide semiconductor film formed in the same step asthe oxide semiconductor film 308, it serves as an electrode.

The insulating film 314 is provided to cover the oxide semiconductorfilm 308 and the conductive films 310 and 312. The insulating film 314covers one end portion of the electrode 354 and one end portion of theconductive film 313. The insulating film 314 has the opening 364 throughwhich part of the electrode 354 and part of the conductive film 313 areexposed.

The insulating film 321 is provided over the insulating film 314, theelectrode 354, and the conductive film 313. An opening 366 reaching theconductive film 312 is formed in the insulating films 314 and 321. Thepixel electrode 322 is provided over the insulating film 321, and isconnected to the conductive film 312 through the opening 366. The pixelelectrode 322 is provided in a position overlapping with the electrode354 serving as the first common electrode, and has openings (slits) asillustrated in the top view of FIG. 10. The alignment film 324 isprovided over the insulating film 321 and the pixel electrode 322.

A substrate 330 is provided to face the substrate 302. A light-blockingfilm 332 having a function of blocking visible light, a color film 334transmitting visible light within a certain wavelength range, aninsulating film 336 in contact with the light-blocking film 332 and thecolor film 334, a second common electrode 338 in contact with theinsulating film 336, and an alignment film 340 in contact with thesecond common electrode 338 are provided under the substrate 330.

Between the substrate 302 and the substrate 330, a liquid crystal layer350 containing a liquid crystal material is interposed between thealignment film 324 and the alignment film 340. The liquid crystalelement 111 includes the electrode 354 serving as the first commonelectrode, the insulating film 321, the pixel electrode 322, and thesecond common electrode 338. Note that a negative liquid crystalmaterial is used for the liquid crystal layer 350, and the specificresistivity of the liquid crystal material is greater than or equal to1.0×10¹³ Ω·cm and less than or equal to 1.0×10¹⁶ Ω·cm.

The configuration of the pixel 100 of this embodiment is different fromthe configuration of the pixel 100 illustrated in FIG. 5 and FIG. 6 ofEmbodiment 1 mainly in the following points: an insulating film servingas a planarization film is not used; the electrode 354 serving as thefirst common electrode is formed in the same step as the oxidesemiconductor film 308; and the conductive film 313 serving as acapacitor line is provided in contact with the electrode 354.

Since a planarization film is not used, impurities (e.g., water)contained in the planarization film can be prevented from entering theoxide semiconductor film 308. Thus, the reliability of the transistor112 including the oxide semiconductor film 308 can be improved, leadingto a liquid crystal display device with high display quality.

An example of a method for manufacturing the pixel illustrated in FIG.11 is described with reference to FIGS. 12A to 12D and FIGS. 12A to 13C.

As illustrated in FIG. 12A, a conductive film is formed over thesubstrate 302 and processed by etching or the like, whereby theconductive film 304 is formed. Next, the insulating film 306 is formedover the conductive film 304, and an oxide semiconductor film is formedover the insulating film 306. The oxide semiconductor film is processedby etching or the like into the oxide semiconductor film 308 and theoxide semiconductor film 352. The oxide semiconductor film 308 has aseparated island shape and is positioned in a region overlapping withthe conductive film 304. The oxide semiconductor film 352 is apart fromthe oxide semiconductor film 308.

For the substrate 302, the conductive film 304, the insulating film 306,and the oxide semiconductor film 308, the materials and formationmethods for the substrate 302, the conductive film 304, the insulatingfilm 306, and the oxide semiconductor film 308 described in Embodiment 1can be referred to. The oxide semiconductor film 352 can be formed byusing the same material and formation method as the oxide semiconductorfilm 308.

Next, a conductive film is formed over the insulating film 306 and theoxide semiconductor films 308 and 352 and processed by etching or thelike, whereby the conductive films 310 and 312 in contact with the oxidesemiconductor film 308 and the conductive film 313 in contact with theoxide semiconductor film 352 are formed, as illustrated in FIG. 12B.

For the conductive films 310, 312, and 313, the materials and formationmethod for the conductive films 310, 312, and 313 described inEmbodiment 1 can be referred to.

Next, as in FIG. 12C, the insulating film 314 is formed over theinsulating film 306, the oxide semiconductor films 308 and 352, and theconductive films 310, 312, and 313.

For the insulating film 314, the material and formation method for theinsulating film 314 described in Embodiment 1 can be referred to.

Next, as in FIG. 12D, the insulating film 314 is processed by etching orthe like, whereby the opening 364 is formed to expose part of the oxidesemiconductor film 352 and part of the conductive film 313. Note that asurface of the conductive film 313 is not necessarily exposed throughthe opening 364 as long as at least the oxide semiconductor film 352 isexposed.

The opening 364 is formed, for example, by a dry etching method or a wetetching method. Alternatively, the opening 364 may be formed by acombination of a dry etching method and a wet etching method.

Next, as in FIG. 13A, the insulating film 321 is formed to cover theinsulating film 314 and the opening 364.

The insulating film 321 is formed using a material which preventsdiffusion of impurities from the outside, such as water, alkali metal,and alkaline earth metal, into the oxide semiconductor film, and thematerial further includes hydrogen. Thus, when hydrogen in theinsulating film 321 is diffused into the oxide semiconductor film 352,hydrogen is bonded to oxygen or to oxygen vacancies to generateelectrons that are carriers in the oxide semiconductor film 352. As aresult, the oxide semiconductor film 352 has higher conductivity thanthe oxide semiconductor film 308, and becomes the electrode 354 servingas the first common electrode.

For example, a silicon nitride film, a silicon nitride oxide film, orthe like having a thickness of from 50 nm to 400 nm can be used as theinsulating film 321. In this embodiment, a silicon nitride film having athickness of 100 nm is used as the insulating film 321.

The silicon nitride film is preferably formed at a high temperature tohave an improved blocking property; for example, the silicon nitridefilm is preferably formed at a temperature in the range from thesubstrate temperature of 100° C. to the strain point of the substrate,more preferably at a temperature in the range from 300° C. to 400° C.Note that in the case where the silicon nitride film is formed at a hightemperature, a phenomenon in which oxygen is released from the oxidesemiconductor film 308 and the carrier concentration is increased iscaused in some cases; therefore, the upper limit of the temperature is atemperature at which the phenomenon is not caused.

Although not illustrated in FIG. 11 and FIGS. 13A to 13C, an insulatingfilm may be formed after the formation of the insulating film 321. Asthe insulating film, for example, a silicon oxide film formed using anorganosilane gas by a PE-CVD method can be used. The silicon oxide filmcan be formed to a thickness of greater than or equal to 300 nm and lessthan or equal to 600 nm. For example, any of the followingsilicon-containing compound can be used for the organosilane gas:tetraethyl orthosilicate (TEOS) (chemical formula: Si(OC₂H₅)₄);tetramethylsilane (TMS) (chemical formula: Si(CH₃)₄;tetramethylcyclotetrasiloxane (TMCTS); octamethylcyclotetrasiloxane(OMCTS); hexamethyldisilazane (HMDS); triethoxysilane (SiH(OC₂H₅)₃); andtrisdimethylaminosilane (SiH(N(CH₃)₂)₃). For example, the silicon oxidefilm is formed using an organosilane gas and oxygen by a PE-CVD methodat a substrate temperature of 200° C. or higher and 550° C. or lower,preferably 220° C. or higher and 500° C. or lower, further preferably300° C. or higher and 450° C. or lower.

The insulating film formed over the insulating film 321 can smooth anuneven surface caused by a transistor or the like. Furthermore, sincethe insulating film is formed using an inorganic material, theinsulating film contains fewer impurities that adversely affect an oxidesemiconductor film than a resin planarization film using an organicmaterial.

It is preferable that heat treatment be performed at least after theformation of the insulating film 314 so that oxygen contained in theinsulating film 314 is transferred to the oxide semiconductor film 308to fill oxygen vacancies in the oxide semiconductor film 308.

Next, as in FIG. 13B, desired regions in the insulating films 314 and321 are removed, whereby the opening 366 reaching the conductive film312 is formed.

The opening 366 is formed by, for example, a dry etching method or a wetetching method. Alternatively, the opening 366 may be formed by acombination of a dry etching method and a wet etching method.

Next, as in FIG. 13C, the pixel electrode 322 is formed over theinsulating film 321. The pixel electrode 322 is connected to theconductive film 312 through the opening 366.

The pixel electrode 322 is formed in such a manner that a transparentconductive film is formed over the insulating film 321 and processed byetching or the like.

For the pixel electrode 322, the material and formation method for thepixel electrode 322 described in Embodiment 1 can be referred to.

Next, an alignment film 324 (not illustrated) is formed over theinsulating film 321 and the pixel electrode 322. The alignment film 324can be formed by a rubbing method, an optical alignment method, or thelike.

Through the above steps, the components formed over the substrate 302can be formed.

For the liquid crystal element 111, the substrate 330 provided to facethe substrate 302, and the like, the description in Embodiment 1 can bereferred to.

The structures, the methods, and the like described in this embodimentcan be combined as appropriate with any of the structures, the methods,and the like described in the other embodiments.

Embodiment 4

In this embodiment, examples of electronic devices including the liquidcrystal display device of one embodiment of the present invention aredescribed with reference to FIGS. 14A to 14E.

The liquid crystal display device of one embodiment of the presentinvention can be used for display devices, personal computers, or imagereproducing devices provided with recording media (typically, devicesthat reproduce the content of recording media such as digital versatilediscs (DVDs) and have displays for displaying the reproduced images).Other examples of the electronic devices to which the liquid crystaldisplay device of one embodiment of the present invention can be appliedinclude cellular phones, game machines (including portable gamemachines), personal digital assistants, e-book readers, cameras such asvideo cameras and digital still cameras, goggle-type displays (headmounted displays), navigation systems, audio reproducing devices (e.g.,car audio systems and digital audio players), copiers, facsimiles,printers, multifunction printers, automated teller machines (ATMs), andvending machines. FIGS. 14A to 18F illustrate specific examples of theseelectronic devices.

FIG. 14A illustrates a portable game machine, which includes a housing5001, a housing 5002, a display portion 5003, a display portion 5004, amicrophone 5005, speakers 5006. an operation key 5007, a stylus 5008,and the like. The liquid crystal display device of one embodiment of thepresent invention can be used for the display portion 5003 or thedisplay portion 5004. Note that although the portable game machine inFIG. 14A has the two display portions 5003 and 5004, the number ofdisplay portions included in the portable game machine is not limitedthereto.

FIG. 14B illustrates a display device, which includes a housing 5201, adisplay portion 5202, a support 5203, and the like. The liquid crystaldisplay device of one embodiment of the present invention can be usedfor the display portion 5202. Note that the display device means alldisplay devices for displaying information, such as display devices forpersonal computers, for receiving TV broadcast, and for displayingadvertisements.

FIG. 14C illustrates a laptop personal computer, which includes ahousing 5401, a display portion 5402, a keyboard 5403, a pointing device5404, and the like. The liquid crystal display device of one embodimentof the present invention can be used for the display portion 5402.

FIG. 14D illustrates a personal digital assistant, which includes afirst housing 5601, a second housing 5602, a first display portion 5603,a second display portion 5604, a joint 5605, an operation key 5606, endthe like. The first display portion 5603 is provided in the firsthousing 5601, and the second display portion 5604 is provided in thesecond housing 5602. The first housing 5601 and the second housing 5602are connected to each other with the joint 5605, and the angle betweenthe first housing 5601 and the second housing 5602 can be changed withthe joint 5605. An image on the first display portion 5603 may beswitched depending on the angle between the first housing 5601 and thesecond housing 5602 at the joint 5605. The liquid crystal display deviceof one embodiment of the present invention can be used for the firstdisplay portion 5603 or the second display portion 5604. A liquidcrystal display device with a position input function nay be used as atleast one of the first display portion 5603 and the second displayportion 5604. Note that the position input function can be added byprovision of a touch panel in a liquid crystal display device.Alternatively, the position input function can be added by provision ofa photoelectric conversion element also called a photosensor in a pixelportion of a liquid crystal display device.

FIG. 14E illustrates a video camera, which includes a first housing5801, a second housing 5802, a display portion 5803, operation keys5804, a lens 5805, a joint 5806, and the like. The operation keys 5804and the lens 5805 are provided in the first housing 5801, and thedisplay portion 5803 is provided in the second housing 5802. The firsthousing 5801 and the second housing 5802 are connected to each otherwith the joint 5806, and the angle between the first housing 5801 andthe second housing 5802 can be changed with the joint 5806. An image onthe display portion 5803 may be switched depending on the angle betweenthe first housing 5801 and the second housing 5802 at the joint 5806.The liquid crystal display device of one embodiment of the presentinvention can be used for the display portion 5803.

FIG. 14F illustrates a cellular phone. In the cellular phone, a displayportion 5902, a microphone 5907, a speaker 5904, a camera 5903, anexternal connection portion 5906, and an operation button 5905 areprovided in a housing 5901. The liquid crystal display device of oneembodiment of the present invention can be used for a circuit includedin the cellular phone. In the case where the liquid crystal displaydevice of one embodiment of the present invention is formed over aflexible substrate, it can be applied to the display portion 5902 havinga curved surface as shown in FIG. 14F.

The structures, the methods, and the like described in this embodimentcan be combined as appropriate with any of the structures, the methods,and the like described in the other embodiments.

Example 1

In this example, the transmittance of the liquid crystal display deviceof one embodiment of the present invention was measured. The liquidcrystal display devices used in this example are described below withreference to FIGS. 15A and 15B.

A liquid crystal display device 720 illustrated in FIG. 15A is anexample of the liquid crystal display device of one embodiment of thepresent invention.

The liquid crystal display device 720 illustrated in FIG. 15A includes asubstrate 602; a conductive film 604 serving as a gate of a transistorand being over the substrate 602; an insulating film 606 over thesubstrate 602 and the conductive film 604; an insulating film 606; anoxide semiconductor film 608 over the insulating film 606 in a regionoverlapping with the conductive film 604; conductive films 610 and 612connected to the oxide semiconductor film 608; an insulating film 614over the insulating film 606, the oxide semiconductor film 608, and theconductive films 610 and 612; an insulating film 616 over the insulatingfilm 614; a first common electrode 618 over the insulating film 616; aninsulating film 620 over the insulating film 614 and the first commonelectrode 618; a pixel electrode 622 over the insulating film 620; analignment film 624 over the insulating film 620 and the pixel electrode622; a liquid crystal layer 650 over the alignment film 624; analignment film 640 over the liquid crystal layer 650; a second commonelectrode 638 over the alignment film 640; an insulating film 636 overthe second common electrode 638; a light-blocking film 632 and a colorfilm 634 over the insulating film 636; and a substrate 630 over thelight-blocking film 632 and the color film 634.

A transistor 712 includes the conductive film 604, the insulating film606, the oxide semiconductor film 608, and the conductive films 610 and612. The conductive film 612 included in the transistor 712 is connectedto the pixel electrode 622 through an opening formed in the insulatingfilms 616 and 620.

Next, a comparative liquid crystal display device 730 illustrated inFIG. 15B is described.

The comparative liquid crystal display device 730 illustrated in FIG.15B includes a substrate 602; a conductive film 604 serving as a gate ofa transistor and being over the substrate 602; an insulating film 606over the substrate 602 and the conductive film 604; an insulating film606; an oxide semiconductor film 608 over the insulating film 606 in aregion overlapping with the conductive film 604; conductive films 610and 612 connected to the oxide semiconductor film 608; an insulatingfilm 614 over the insulating film 606, the oxide semiconductor film 608,and the conductive films 610 and 612; an insulating film 616 ever theinsulating film 614; a first common electrode 618 over the insulatingfilm 616; an insulating film 620 over the insulating film 614 and thefirst common electrode 618; a pixel electrode 622 over the insulatingfilm 620; an alignment film 624 over the insulating film 620 and thepixel electrode 622; a liquid crystal layer 650 over the alignment film624; an alignment film 640 over the liquid crystal layer 650; aninsulating film 636 over the alignment film 640; a light-blocking film632 and a color film 634 over flic insulating film 636; a substrate 630over the light-blocking film 632 and the color film 634; and anelectrode 642 over the substrate 630.

The transistor 712 includes the conductive film 604, the insulating film606, the oxide semiconductor film 608, and the conductive films 610 and612. The conductive film 612 included in the transistor 712 is connectedto the pixel electrode 622 through an opening formed in the insulatingfilms 616 and 620.

Differences between the liquid crystal display device 720 of oneembodiment of the present invention illustrated in FIG. 15A and thecomparative liquid crystal display device 730 illustrated in FIG. 15Bare the second common electrode 638 and the electrode 642. Specifically,the second common electrode 638 is provided under the substrate 630 inthe liquid crystal display device 720 whereas the electrode 642 isprovided over the substrate 630 in the comparative liquid crystaldisplay device 730.

In the structure illustrated in FIG. 15A, voltage can be applied to theliquid crystal layer 650 through the alignment film 640 by the secondcommon electrode 638. In contrast, in the structure illustrated in FIG.15B, since the electrode 642 is provided over the substrate 630, it isdifficult to apply voltage to the liquid crystal layer 650 by theelectrode 642.

Methods for manufacturing the liquid crystal display devices 720 and 730illustrated in FIGS. 15A and 15B are described below. The liquid crystaldisplay device 720 and the comparative liquid crystal display device 730have the same structure except for the second common electrode 638 andthe electrode 642. First, steps for forming the common components aredescribed below.

A glass substrate was used as the substrate 602. The conductive film 604was formed over the substrate 602. A 200-nm-thick tungsten film wasformed by a sputtering method as the conductive film 604. Then, theinsulating film 606 was formed over the substrate 602 and the conductivefilm 604. A 400-nm-thick silicon nitride film and a 50-nm-thick siliconoxynitride film were stacked as the insulating film 606.

Note that the silicon nitride film was formed to have a three-layerstructure of a first silicon nitride film, a second silicon nitridefilm, and a third silicon nitride film.

The first silicon nitride film was formed to a thickness of 50 nm underthe following conditions: silane with a flow rate of 200 sccm, nitrogenwith a flow rate of 2000 sccm, and ammonia with a flow rate of 100 sccmwere supplied to a treatment chamber of a plasma CVD apparatus as esource gas; the pressure in the treatment chamber was adjusted to 100Pa; and a power of 2000 W was supplied with the use of a 27.12 MHzhigh-frequency power source. The second silicon nitride film was formedto a thickness of 300 nm under the following conditions: silane with aflow rate of 200 sccm, nitrogen with a flow rate of 2000 sccm, andammonia with a flow rate of 2000 sccm were supplied to a treatmentchamber of a plasma CVD apparatus as a source gas; the pressure in thetreatment chamber was adjusted to 100 Pa; and a power of 2000 W wassupplied with the use of a 27.12 MHz high-frequency power source. Thethird silicon nitride film was formed to a thickness of 50 nm under thefollowing conditions: silane with a flow rate of 200 sccm and nitrogenwith a flow rate of 5000 sccm were supplied to a treatment chamber of aplasma CVD apparatus as a source gas; the pressure in the treatmentchamber was adjusted to 100 Pa; and a power of 2000 W was supplied withthe use of a 27.12 MHz high-frequency power source. The substratetemperature during the formation of the first silicon nitride film, thesecond silicon nitride film, and the third silicon nitride film was setto 350® C.

The silicon oxynitride film was formed under the following conditions:silane with a flow rate of 20 sccm and dinitrogen monoxide with a flowrate of 3000 sccm were supplied to a treatment chamber of a plasma CVDapparatus as a source gas; the pressure in the treatment chamber wasadjusted to 40 Pa; and a power of 100 W was supplied with the use of a27.12 MHz high-frequency power source. The substrate temperature duringthe formation of the silicon oxynitride film was set to 350° C.

Next, the oxide semiconductor film 608 was formed over the insulatingfilm 606 in a region overlapping with the conductive film 604. Here, a35-nm-thick oxide semiconductor film was formed over the insulating film614 by a sputtering method.

The oxide semiconductor film was formed under the following conditions:a sputtering target of In:Ga:Zn=1:1:1 (atomic ratio) was used; oxygenwith a flow rate of 30 sccm and argon with a flow rate of 270 sccm weresupplied as a sputtering gas into a treatment chamber of a sputteringapparatus; the pressure in the treatment chamber was adjusted to 0.6 Pa;and a direct-current power of 5 kW was supplied. The substratetemperature during the formation of the oxide semiconductor film was setto 170° C.

Then, the conductive films 610 and 612 in contact with the oxidesemiconductor film 608 were formed.

As the conductive films 610 and 612, a 400-nm-thick aluminum film wasformed over a 50-nm-thick tungsten film, and a 100-nm-thick titaniumfilm was formed over the aluminum film.

Next, after the substrate was transferred to a treatment chamber in areduced pressure and heated at 350° C., the oxide semiconductor film 608was exposed to oxygen plasma that was generated in a dinitrogen monoxideatmosphere by supply of a high-frequency power of 150 W to an upperelectrode provided in the treatment chamber with the use of a 27.12 MHzhigh-frequency power source.

Next, the insulating film 614 was formed over the oxide semiconductorfilm 608 and the conductive films 610 and 612. Hera, the insulating film614 was formed to have a three-layer structure of a first oxideinsulating film, a second oxide insulating film, and a nitrideinsulating film.

First, after the above plasma treatment, the first oxide insulating filmand the second oxide insulating film were formed in succession withoutexposure to the air. A 50-nm-thick silicon oxynitride film was formed asthe first oxide insulating film, and a 400-nm-thick silicon oxynitridefilm was formed as the second oxide insulating film.

The first oxide insulating film was formed by a plasma CVD method underthe following conditions: silane with a flow rate of 20 sccm anddinitrogen monoxide with a flow rate of 3000 sccm were used as a sourcegas; the pressure in the treatment chamber was 200 Pa; the substratetemperature was 350° C.; and a high-frequency power of 100 W wassupplied to parallel-plate electrodes.

The second oxide insulating film was formed by a plasma CVD method underthe following conditions: silane with a flow rate of 160 sccm anddinitrogen monoxide with a flow rate of 4000 sccm were used as a sourcegas; the pressure in the treatment chamber was 200 Pa; the substratetemperature was 220° C.; and a high-frequency power of 1500 W wassupplied to parallel-plate electrodes. Under the above conditions, it ispossible to form a silicon oxynitride film containing oxygen at a higherproportion than oxygen in the stoichiometric composition and from whichpart of oxygen is released by heating.

Next, by heal treatment, water, nitrogen, hydrogen, and the like werereleased from the first oxide insulating film and the second oxideinsulating film and part of oxygen contained in the second oxideinsulating film was supplied to the oxide semiconductor film 608. Here,the heat treatment was performed at 350° C. in a mixed atmosphere ofnitrogen and oxygen for one hour.

Then, a 100-nm-thick nitride insulating film was formed over the secondoxide insulating film. The nitride insulating film was formed by aplasma CVD method under the following conditions: silane with a flowrate of 50 sccm, nitrogen with a flow rate of 5000 sccm, and ammoniawith a flow rate of 100 sccm were used as a source gas; the pressure inthe treatment chamber was 100 Pa; the substrate temperature was 350° C.;and a high-frequency power of 1000 W was supplied to parallel plateelectrodes.

Next, an opening reaching the conductive film 612 was formed in theinsulating film 614. The opening was formed by a dry etching method.

The insulating film 616 having an opening was formed over the insulatingfilm 614. An acrylic resin, which is an organic resin material, was usedfor the insulating film 616. The thickness of the acrylic resin film wasset to 2 μm.

The first common electrode 618 was formed over the insulating film 616.As the first common electrode 618, a 100-nm-thick conductive film of anindium oxide-tin oxide compound (ITO-SiO₂) was formed by a sputteringmethod. Note that the composition of a target used for forming theconductive film was In₂O₃:SnO₂:SiO₂=85:10:5 [wt %].

Then, the insulating film 620 was formed over the insulating film 616and the first common electrode 618. A 300-nm-thick nitride insulatingfilm was formed as the insulating film 620. The nitride insulating filmwas formed by a plasma CVD method under the following conditions: silanewith a flow rate of 50 sccm, nitrogen with a flow fate of 5000 sccm, andammonia with a flow rate of 100 seem were used as a source gas; thepressure in the treatment chamber was 200 Pa; the substrate temperaturewas 220° C.; and a high-frequency power of 1000 W was supplied toparallel plate electrodes.

Subsequently, the pixel electrode 622 was formed over the insulatingfilm 620. As the pixel electrode 622, a 80-nm-thick conductive film ofan indium oxide-tin oxide compound (ITO-SiO₂) was formed by a sputteringmethod. Note that the composition of a target used for forming theconductive film was the same as the composition of a target used forforming the first common electrode 618. After that, heat treatment wasperformed in a nitrogen atmosphere at 250° C. for one hour.

Next, the alignment film 624 was formed over the insulating film 620 andthe pixel electrode 622. A 60-nm-thick polyimide film was used as thealignment film 624. Note that the resistivity of the polyimide film usedas the alignment film 624 was 4.0×10¹⁵ Ω·cm.

Through the above steps, the components over the substrate 602 wereformed.

Next, a method for forming components on the substrate 630 provided toface the substrate 602 is described. Note that the liquid crystaldisplay device 720 illustrated in FIG. 15A is different from thecomparative liquid crystal display device 730 illustrated in FIG. 15B inthe components on the substrate 630. Therefore, methods formanufacturing the liquid crystal display devices 720 and 730 areseparately described below. Hereinafter, the liquid crystal displaydevice 720 is referred to as Sample 1 and the comparative liquid crystaldisplay device 730 is referred to as Comparative Sample 2.

Method for Manufacturing Components on the Substrate 630 Illustrated inFIG. 15A

A glass substrate was used as the substrate 630. The light-blocking film632 was formed in a desired region to be in contact with the substrate630. As the light-blocking film 632, a 600-nm-thick organic resin filmcontaining black pigment was formed by a spin coating method.

Next, the color film 634 was formed in contact with the substrate 630.As the color film 634, a 1.4-μm-thick organic resin film containingpigment was formed by a spin coating method.

Then, the insulating film 636 was formed in contact with thelight-blocking film 632 and the color film 634. A 1.5-μm-thick acrylicresin film was used as the insulating film 636.

Subsequently, the second common electrode 638 was formed in contact withthe insulating film 636. As the second common electrode 638, a100-nm-thick conductive film of an indium oxide-tin oxide compound(ITO-SiO₂) was formed by a sputtering method. Note that the compositionof a target used for forming the conductive film was the same as thecomposition of a target used for forming the first common electrode 618.

Then, the alignment film 640 was formed in contact with the secondcommon electrode 638. The alignment film 640 was formed using the samematerial as the alignment film 624.

Next, the substrate 630 and the substrate 602 were bonded to each other,and a liquid crystal material forming the liquid crystal layer 650 wasinjected between the substrates by a one drop filling method.

The liquid crystal layer 650 was formed using a negative liquid crystalmaterial (MLC-3006 produced by Merck) such that the cell gap (thedistance between the alignment film 624 and the alignment film 640) wasset to 3.5 μm.

Through the above steps, Sample 1, which is the liquid crystal displaydevice of one embodiment of the present invention illustrated in FIG.15A, was manufactured.

Method for Manufacturing Components on the Substrate 630 Illustrated inFIG. 15B

A glass substrate was used as the substrate 630. The light-blocking film632 was formed in a desired region to be in contact with the substrate630. As the light-blocking film 632, a 600-nm-thick organic resin filmcontaining black pigment was formed by a spin coating method.

Next, the color film 634 was formed in contact with the substrate 630.As the color film 634, a 1.4-μm-thick organic resin film containingpigment was formed by a spin coating method.

Then, the insulating film 636 was formed in contact with thelight-blocking film 632 and the color film 634. A 1.5-μm-thick acrylicresin film was used as the insulating film 636.

Subsequently, the electrode 642 was formed in contact with a surface ofthe substrate 630 where the insulating film 636 was not provided. As thethe electrode 642, a 100-nm-thick conductive film of an indium oxide-tinoxide compound (ITO-SiO₂) was formed by a sputtering method. Note thatthe composition of a target used for forming the conductive film was thesame as the composition of a target used for forming the first commonelectrode 618.

Then, the alignment film 640 was formed in contact with the insulatingfilm 636. The alignment film 640 was formed using the same material asthe alignment film 624.

Next, the the substrate 630 and the substrate 602 were bonded to eachother, and a liquid crystal material forming the liquid crystal layer650 was injected between the substrates by a one drop filling method.

The liquid crystal layer 650 was formed using a negative liquid crystalmaterial (MLC-3006 produced by Merck) such that the cell gap (thedistance between the alignment film 624 and the alignment film 640) wasset to 3.5 μm.

Through the above steps, Comparative Sample 2, which is the comparativeliquid crystal display device illustrated in FIG. 15B, was manufactured.

Next, the transmittances of Sample 1 and Comparative Sample 2 weremeasured. In measuring the transmittance of Sample 1, voltages of 0 V,5.5 V, and 0.8 V were applied to the first common electrode 618, thepixel electrode 622, and the second common electrode 638, respectively.The voltage application to the pixel electrode 622, the second commonelectrode 638, and the second common electrode 638 was performedintermittently, and data writing was performed every time voltage wasapplied. In measuring the transmittance of Comparative Sample 2,voltages of 0 V, 5.5 V, and 0.8 V were applied to the first commonelectrode 618, the pixel electrode 622, and the electrode 642,respectively. The voltage application to the pixel electrode 622, thesecond common electrode 638, and the electrode 642 was performedintermittently and data writing was performed every time voltage wasapplied. Note that data writing in Sample 1 and Comparative Sample 2 wascontrolled by the transistor 712 formed in Sample 1 and ComparativeSample 2.

FIGS. 16A and 16B, FIGS. 17A and 17B, FIGS. 18A and 18B, FIGS. 19A and19B, and FIGS. 20A and 20B show transmittance-time characteristics ofSample 1 and Comparative Sample 2. In these drawings, the horizontalaxis represents time (s) and the vertical axis represents transmittance(%). FIGS. 16A and 16B, FIGS. 17A and 17B, FIGS. 18A and 18B, FIGS. 19Aand 19B, and FIGS. 20A and 20B show transmittance-time characteristicsat the maximum gray level (at a transmittance of 100%). FIGS. 21A to 21Cshow transmittance-time characteristics of Sample 1.In FIGS. 21A to 21C,the horizontal axis represents time (s) and the vertical axis representstransmittance (%). FIGS. 21A to 21C show transmittance-timecharacteristics at an intermediate gray level (at a transmittance of50%). Note that the transmittance-time characteristics at theintermediate gray level may be different from the transmittance-timecharacteristics at the maximum gray level.

The transmittance-time characteristics shown in FIG. 16A, FIG. 17A, FIG.18A, FIG. 19A, and FIG. 20A are the results of Sample 1 of oneembodiment of the present invention; the transmittance-timecharacteristics shown in FIG. 16B. FIG. 17B, FIG. 18B. FIG. 19B, andFIG. 20B are the results of Comparative Sample 2.

FIGS. 16A and 16B show the transmittance-time characteristics in thecase where data writing is performed once every second; FIGS. 17A and17B data writing is performed once every 5 seconds; FIGS. 18A and 18B,once every 15 seconds; FIGS. 19A and 19B, once every 30 seconds; andFIGS. 20A and 20B, once every 60 seconds. Note that timings for datawriting operations are different between the graphs with the sameinterval between data writing operations. Therefore, time for datawriting operation is not the same between FIGS. 16A and 16B, betweenFIGS. 17A and 17B, between FIGS. 18A and 18B, between FIGS. 19A and 19B,and between FIGS. 20A and 20B.

FIG. 21A shows the transmittance-time characteristics in the case wheredata writing is performed once every second; FIG. 21B, once every 5seconds; and FIG. 21C, once every 60 seconds.

The results shown in FIGS. 16A and 16B, FIGS. 17A and 17B, FIGS. 18A and18B, FIGS. 19A and 19B, and FIGS. 20A and 20B indicate that Sample 1 ofone embodiment of the present invention has a small time-dependentchange in transmittance whereas Comparative Sample 2 has a largetime-dependent change in transmittance. In particular, in the case wherethe time interval between data writing operations is long for example,in the case of FIG. 20B where data writing is performed once every 60seconds, the coefficient of transmittance fluctuation is greater than orequal to 3%. This result indicates that in Sample 1 of one embodiment ofthe present invention, change in transmittance of the liquid crystallayer 650 can be made small by application of voltage to the secondcommon electrode 638. In contrast, in Comparative Sample 2, the secondcommon electrode 638 is not provided, and a potential having the samelevel as a potential applied to the second common electrode 638 inSample 1 is applied to the electrode 642 over the substrate 630. Sincethe electrode 642 does not supply potential to the liquid crystal layer650, change in transmittance in the liquid crystal layer 650 cannot besmall.

The results shown in FIGS. 21A to 21C indicate that, in Sample 1 of oneembodiment of the present invention, the coefficient of transmittancefluctuation is approximately 2% in the case where data writing isperformed once every 5 seconds. This fluctuation might be perceived as aflicker depending on a display image; therefore, the lime intervalbetween data writing operations is preferably shorter than 5 seconds.

Example 2

In this example, the transmittance of the liquid crystal display deviceof one embodiment of the present invention was calculated. Thestructures of the liquid crystal display devices used for thecalculation in this example are described below with reference to FIGS.22A and 22B.

The liquid crystal display device that is used for calculation andillustrated in FIG. 22A includes a substrate 802; electrodes 804 a, 804b, 854 a, and 854 b over the substrate 802; an insulating film 814covering the electrodes 804 a and 804 b and end portions of theelectrodes 854 a and 854 b; an insulating film 821 over the insulatingfilm 814 and the electrodes 854 a and 854 b; an insulating film 856 overthe insulating film 821; a pixel electrode 822 a over the insulatingfilms 821 and 856 in a region overlapping with the electrode 854 a; apixel electrode 822 b over the insulating films 821 and 856 in a regionoverlapping with the electrode 854 b; a liquid crystal layer 850 overthe insulating film 856 and the pixel electrodes 822 a and 822 b; anelectrode 838 over the liquid crystal layer 850; and a substrate 830over the electrode 838.

For convenience of calculation, the liquid crystal display device forcalculation illustrated in FIG. 22A has a structure obtained bysimplifying the structure of the pixel in the liquid crystal displaydevice of one embodiment of the present invention illustrated in FIG. 10and FIG. 11. Specifically, the substrate 802 in FIG. 22A corresponds tothe substrate 302 in FIG. 11; the electrodes 804 a and 804 b, theconductive film 304; the electrodes 854 a and 854 b, the electrode 354;the insulating film 814, the insulating film 314; the insulating film821, the insulating film 321; the pixel electrodes 822 a and 822 b, thepixel electrode 322; the liquid crystal layer 850, the liquid crystallayer 350; the electrode 838, the second common electrode 338; and thesubstrate 830, the substrate 330. Note that the insulating film 856 inFIG. 22A is not illustrated in FIG. 11.

A liquid crystal display device that is used for calculation andillustrated in FIG. 22B has the same structure as the liquid crystaldisplay device illustrated in FIG. 22A except that the electrode 838over the liquid crystal layer 850 is not provided.

FIG. 22A and FIG. 22B each illustrate a cross-sectional structure of twopixels in the liquid crystal display device. The left side of thedrawing, specifically, the region including the electrode 804 a, theelectrode 854 a, and the pixel electrode 822 a corresponds to one pixel,and the right side, specifically, the region including the electrode 804b, the electrode 854 b, and the pixel electrode 822 b corresponds to theother pixel. In FIGS. 22A and 22B, each of the pixel electrodes 822 aand 822 b corresponds to separated three electrodes.

The liquid crystal display device for calculation illustrated in FIG.22A is referred to as Sample 3. The liquid crystal display device forcalculation illustrated in FIG. 22B is referred to as Comparative Sample4. Sample 3 has a structure of the liquid crystal display device of oneembodiment of the present invention. Comparative Sample 4 has astructure of the comparative liquid crystal display device.

In FIGS. 22A and 22B, each of the electrodes 804 a and 804 b has athickness of 200 nm and a width of 2 μm; each of the electrodes 854 aand 854 b has a thickness of 200 nm and a width of 20 μm; the insulatingfilm 814 has a thickness of 500 nm; the insulating film 821 has athickness of 100 nm; the insulating film 856 has a thickness of 400 nm;each of the pixel electrodes 822 a and 822 b has a thickness of 100 nmand a width of 2 μm; the liquid crystal layer 850 has a thickness of 4μm; and the negative liquid crystal material (MLC-3006 produced byMerck) was used. In FIG. 22A, the electrode 838 has a thickness of 100nm.

In the liquid crystal display device for calculation illustrated in FIG.22A, the transmittance of the liquid crystal layer 850 was calculated inthe case where 0 V was applied to the electrode 804 a; 6 V, theelectrode 804 b; 0 V, the electrodes 854 a and 854 b; 0 V, the pixelelectrode 822 a; 6 V, the pixel electrode 822 b; and 0 V, the electrode838.

In the liquid crystal display device for calculation illustrated in FIG.22B, the transmittance of the liquid crystal layer 850 was calculated inthe case where 0 V was applied to the electrode 804 a; 6 V, theelectrode 804 b; 0 V, the electrodes 854 a and 854 b; 0 V, the pixelelectrode 822 a; and 6 V, the pixel electrode 822 b. Note that voltagesapplied to these electrodes were set on the assumption mat black displayis performed on the left pixel and white display is performed on theright pixel in FIGS. 22A and 22B.

FIG. 23 shows the results of calculating the transmittances. Thecalculation was performed using calculation software, LCD Master(produced by SHINTECH, Inc.).

In FIG. 23, the horizontal axis represents position (μm); the verticalaxis represents transmittance (%); the solid line represents Sample 3;and the dashed line represents Comparative Sample 4. In FIG. 23, theshapes of the electrodes 804 a, 804 b, 854 a, and 854 b illustrated inFIGS. 22A and 22B are schematically shown by the gray solid line to showthe positions of the electrodes 804 a, 804 b, 854 a, and 854 b.

From the calculation results shown in FIG. 23, it is found that Sample 3of one embodiment of the present invention has low transmittance in theposition near 20 μm to 30 μm. In contrast. Comparative Sample 4 has hightransmittance in the position near 20 μm to 30 μm. This is becauseSample 3 includes the electrode 838 over the liquid crystal layer 850whereas Comparative Sample 4 does not, and voltage applied to theelectrode 838 (in this example, 0 V) prevents transmittance in theposition near 20 μm to 30 μm from increasing in Sample 3. Furthermore,Sample 3 has higher transmittance in the position near 40 μm to 50 μmthan Comparative Sample 4. In FIG. 23, in the left pixel in the position0 μm to 25 μm, voltage applied to the electrodes 804 b and 854 b is 0 V;thus, black display, that is, low transmittance is preferred. In theright pixel in the position 26 μm to 55 μm, voltage applied to theelectrodes 804 b and 854 b is 6 V; thus, white display, that is, hightransmittance is preferred. The calculation results confirm that Sample3 of one embodiment of the present invention has excellent transmittancecharacteristics as compared with Comparative Sample 4 because Sample 3includes the electrode 838 over the liquid crystal layer 850.

As described above, the liquid crystal display device of one embodimentof the present invention can have high black and white contrast betweenadjacent pixels.

The structure described in this example can be combined as appropriatewith any of the structures described in the embodiments or the otherexamples.

This application is based on Japanese Patent Application serial no.2013-106681 filed with Japan Patent Office on May 21, 2013; JapanesePatent Application serial no. 2013-126895 filed with Japan Patent Officeon Jun. 17, 2013; and Japanese Patent Application serial no. 2013-153362filed with Japan Patent Office on Jul. 24, 2013, the entire contents ofwhich are hereby incorporated by reference.

What is claimed is:
 1. A liquid crystal display device comprising: afirst substrate comprising: a transistor; a first electrode electricallyconnected to one of a source electrode and a drain electrode of thetransistor; an insulating layer in contact with the first electrode; asecond electrode in contact with the insulating layer; and a capacitorline electrically connected to the second electrode, a second substratefacing the first substrate, the second substrate comprising a thirdelectrode; and a liquid crystal layer comprising a liquid crystalmaterial between the first substrate and the second substrate, wherein apotential difference between the second electrode and the thirdelectrode is smaller than a potential difference between the thirdelectrode and the first electrode, and wherein the potential differencebetween the third electrode and the first electrode is smaller than apotential difference between the second electrode and the firstelectrode.
 2. The liquid crystal display device according to claim 1,wherein the second electrode is in contact with the capacitor line. 3.The liquid crystal display device according to claim 1, furthercomprising a planarization film between the first substrate and thefirst electrode.
 4. The liquid crystal display device according to claim1, further comprising a color film between the second substrate and thethird electrode.
 5. A liquid crystal display device comprising: a firstsubstrate comprising: a transistor; a first electrode electricallyconnected to one of a source electrode and a drain electrode of thetransistor; an insulating layer in contact with the first electrode; asecond electrode in contact with the insulating layer; and a capacitorline electrically connected to the second electrode, a second substratefacing the first substrate, the second substrate comprising a thirdelectrode; and a liquid crystal layer between the first substrate andthe second substrate, wherein a potential difference between the secondelectrode and the third electrode is smaller than a potential differencebetween the third electrode and the first electrode, wherein thepotential difference between the third electrode and the first electrodeis smaller than a potential difference between the second electrode andthe first electrode, and wherein the liquid crystal layer comprises aliquid crystal material with negative dielectric anisotropy
 6. Theliquid crystal display device according to claim 5, wherein the secondelectrode is in contact with the capacitor line.
 7. The liquid crystaldisplay device according to claim 5, wherein a dielectric constantanisotropy of the liquid crystal material with negative dielectricanisotropy is −3.0.
 8. The liquid crystal display device according toclaim 5, further comprising a planarization film between the firstsubstrate and the first electrode.
 9. The liquid crystal display deviceaccording to claim 5, further comprising a color film between the secondsubstrate and the third electrode.
 10. The liquid crystal display deviceaccording to claim 5, wherein the second electrode and the thirdelectrode are connected to different power supply lines.
 11. A liquidcrystal display device comprising: a first substrate comprising: atransistor; a first electrode electrically connected to one of a sourceelectrode and a drain electrode of the transistor; an insulating layer;a second electrode in contact with the insulating layer; and a capacitorline electrically connected to the second electrode, a second substratefacing the first substrate, the second substrate comprising a thirdelectrode; and a liquid crystal layer comprising a liquid crystalmaterial between the first substrate and the second substrate, whereinthe second electrode has a region overlapping with the first electrodewith the insulating layer provided therebetween, wherein a potentialdifference between the second electrode and the third electrode issmaller than a potential difference between the third electrode and thefirst electrode, and wherein the potential difference between the thirdelectrode and the first electrode is smaller than a potential differencebetween the second electrode and the first electrode.
 12. The liquidcrystal display device according to claim 11, wherein the secondelectrode is in contact with the capacitor line.
 13. The liquid crystaldisplay device according to claim 11, further comprising a planarizationfilm between the first substrate and the first electrode.
 14. The liquidcrystal display device according to claim 11, further comprising a colorfilm between the second substrate and the third electrode.